Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com> |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 4 | */ |
| 5 | |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 6 | #include <dm.h> |
Simon Glass | d2398ab | 2021-03-15 18:00:27 +1300 | [diff] [blame] | 7 | #include <init.h> |
Simon Glass | ec86bc6 | 2022-07-30 15:52:04 -0600 | [diff] [blame] | 8 | #include <vesa.h> |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 9 | #include <video.h> |
Simon Glass | 9a01fd9 | 2021-03-15 18:00:18 +1300 | [diff] [blame] | 10 | #include <asm/cb_sysinfo.h> |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 11 | |
| 12 | static int save_vesa_mode(struct cb_framebuffer *fb, |
| 13 | struct vesa_mode_info *vesa) |
| 14 | { |
| 15 | /* |
| 16 | * If there is no framebuffer structure, bail out and keep |
| 17 | * running on the serial console. |
| 18 | */ |
| 19 | if (!fb) |
Simon Glass | d2398ab | 2021-03-15 18:00:27 +1300 | [diff] [blame] | 20 | return log_msg_ret("save", -ENXIO); |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 21 | |
| 22 | vesa->x_resolution = fb->x_resolution; |
| 23 | vesa->y_resolution = fb->y_resolution; |
| 24 | vesa->bits_per_pixel = fb->bits_per_pixel; |
| 25 | vesa->bytes_per_scanline = fb->bytes_per_line; |
| 26 | vesa->phys_base_ptr = fb->physical_address; |
| 27 | vesa->red_mask_size = fb->red_mask_size; |
| 28 | vesa->red_mask_pos = fb->red_mask_pos; |
| 29 | vesa->green_mask_size = fb->green_mask_size; |
| 30 | vesa->green_mask_pos = fb->green_mask_pos; |
| 31 | vesa->blue_mask_size = fb->blue_mask_size; |
| 32 | vesa->blue_mask_pos = fb->blue_mask_pos; |
| 33 | vesa->reserved_mask_size = fb->reserved_mask_size; |
| 34 | vesa->reserved_mask_pos = fb->reserved_mask_pos; |
| 35 | |
| 36 | return 0; |
| 37 | } |
| 38 | |
| 39 | static int coreboot_video_probe(struct udevice *dev) |
| 40 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 41 | struct video_uc_plat *plat = dev_get_uclass_plat(dev); |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 42 | struct video_priv *uc_priv = dev_get_uclass_priv(dev); |
| 43 | struct cb_framebuffer *fb = lib_sysinfo.framebuffer; |
| 44 | struct vesa_mode_info *vesa = &mode_info.vesa; |
| 45 | int ret; |
| 46 | |
Simon Glass | d2398ab | 2021-03-15 18:00:27 +1300 | [diff] [blame] | 47 | if (ll_boot_init()) |
| 48 | return log_msg_ret("ll", -ENODEV); |
| 49 | |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 50 | printf("Video: "); |
| 51 | |
| 52 | /* Initialize vesa_mode_info structure */ |
| 53 | ret = save_vesa_mode(fb, vesa); |
Simon Glass | d2398ab | 2021-03-15 18:00:27 +1300 | [diff] [blame] | 54 | if (ret) { |
| 55 | ret = log_msg_ret("save", ret); |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 56 | goto err; |
Simon Glass | d2398ab | 2021-03-15 18:00:27 +1300 | [diff] [blame] | 57 | } |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 58 | |
Simon Glass | c1e9eab | 2023-03-10 12:47:13 -0800 | [diff] [blame] | 59 | ret = vesa_setup_video_priv(vesa, vesa->phys_base_ptr, uc_priv, plat); |
Simon Glass | d2398ab | 2021-03-15 18:00:27 +1300 | [diff] [blame] | 60 | if (ret) { |
| 61 | ret = log_msg_ret("setup", ret); |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 62 | goto err; |
Simon Glass | d2398ab | 2021-03-15 18:00:27 +1300 | [diff] [blame] | 63 | } |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 64 | |
| 65 | printf("%dx%dx%d\n", uc_priv->xsize, uc_priv->ysize, |
| 66 | vesa->bits_per_pixel); |
| 67 | |
| 68 | return 0; |
| 69 | |
| 70 | err: |
Simon Glass | d2398ab | 2021-03-15 18:00:27 +1300 | [diff] [blame] | 71 | printf("No video mode configured in coreboot (err=%d)\n", ret); |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 72 | return ret; |
| 73 | } |
| 74 | |
Simon Glass | e96ac57 | 2023-09-19 21:00:11 -0600 | [diff] [blame] | 75 | static int coreboot_video_bind(struct udevice *dev) |
| 76 | { |
| 77 | struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev); |
| 78 | |
| 79 | /* Set the maximum supported resolution */ |
| 80 | uc_plat->size = 4096 * 2160 * 4; |
| 81 | log_debug("%s: Frame buffer size %x\n", __func__, uc_plat->size); |
| 82 | |
| 83 | return 0; |
| 84 | } |
| 85 | |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 86 | static const struct udevice_id coreboot_video_ids[] = { |
| 87 | { .compatible = "coreboot-fb" }, |
| 88 | { } |
| 89 | }; |
| 90 | |
| 91 | U_BOOT_DRIVER(coreboot_video) = { |
| 92 | .name = "coreboot_video", |
| 93 | .id = UCLASS_VIDEO, |
| 94 | .of_match = coreboot_video_ids, |
Simon Glass | e96ac57 | 2023-09-19 21:00:11 -0600 | [diff] [blame] | 95 | .bind = coreboot_video_bind, |
Bin Meng | a0676be | 2016-10-09 04:14:16 -0700 | [diff] [blame] | 96 | .probe = coreboot_video_probe, |
| 97 | }; |