Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Rick Chen | 6eedd92 | 2017-12-26 13:55:49 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2016-17 Microsemi Corporation. |
| 4 | * Padmarao Begari, Microsemi Corporation <padmarao.begari@microsemi.com> |
| 5 | * |
| 6 | * Copyright (C) 2017 Andes Technology Corporation |
| 7 | * Rick Chen, Andes Technology Corporation <rick@andestech.com> |
Sean Anderson | e8b46a1 | 2019-12-25 00:27:44 -0500 | [diff] [blame] | 8 | * |
| 9 | * Copyright (C) 2019 Sean Anderson <seanga2@gmail.com> |
Rick Chen | 6eedd92 | 2017-12-26 13:55:49 +0800 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | #include <common.h> |
Simon Glass | f11478f | 2019-12-28 10:45:07 -0700 | [diff] [blame] | 13 | #include <hang.h> |
Simon Glass | 9b61c7c | 2019-11-14 12:57:41 -0700 | [diff] [blame] | 14 | #include <irq_func.h> |
Rick Chen | 6eedd92 | 2017-12-26 13:55:49 +0800 | [diff] [blame] | 15 | #include <asm/ptrace.h> |
| 16 | #include <asm/system.h> |
| 17 | #include <asm/encoding.h> |
| 18 | |
Sean Anderson | e8b46a1 | 2019-12-25 00:27:44 -0500 | [diff] [blame] | 19 | static void show_regs(struct pt_regs *regs) |
| 20 | { |
| 21 | #ifdef CONFIG_SHOW_REGS |
| 22 | printf("RA: " REG_FMT " SP: " REG_FMT " GP: " REG_FMT "\n", |
| 23 | regs->ra, regs->sp, regs->gp); |
| 24 | printf("TP: " REG_FMT " T0: " REG_FMT " T1: " REG_FMT "\n", |
| 25 | regs->tp, regs->t0, regs->t1); |
| 26 | printf("T2: " REG_FMT " S0: " REG_FMT " S1: " REG_FMT "\n", |
| 27 | regs->t2, regs->s0, regs->s1); |
| 28 | printf("A0: " REG_FMT " A1: " REG_FMT " A2: " REG_FMT "\n", |
| 29 | regs->a0, regs->a1, regs->a2); |
| 30 | printf("A3: " REG_FMT " A4: " REG_FMT " A5: " REG_FMT "\n", |
| 31 | regs->a3, regs->a4, regs->a5); |
| 32 | printf("A6: " REG_FMT " A7: " REG_FMT " S2: " REG_FMT "\n", |
| 33 | regs->a6, regs->a7, regs->s2); |
| 34 | printf("S3: " REG_FMT " S4: " REG_FMT " S5: " REG_FMT "\n", |
| 35 | regs->s3, regs->s4, regs->s5); |
| 36 | printf("S6: " REG_FMT " S7: " REG_FMT " S8: " REG_FMT "\n", |
| 37 | regs->s6, regs->s7, regs->s8); |
| 38 | printf("S9: " REG_FMT " S10: " REG_FMT " S11: " REG_FMT "\n", |
| 39 | regs->s9, regs->s10, regs->s11); |
| 40 | printf("T3: " REG_FMT " T4: " REG_FMT " T5: " REG_FMT "\n", |
| 41 | regs->t3, regs->t4, regs->t5); |
| 42 | printf("T6: " REG_FMT "\n", regs->t6); |
| 43 | #endif |
| 44 | } |
| 45 | |
| 46 | static void _exit_trap(ulong code, ulong epc, ulong tval, struct pt_regs *regs) |
Bin Meng | bcc6c74 | 2018-12-12 06:12:44 -0800 | [diff] [blame] | 47 | { |
| 48 | static const char * const exception_code[] = { |
| 49 | "Instruction address misaligned", |
| 50 | "Instruction access fault", |
| 51 | "Illegal instruction", |
| 52 | "Breakpoint", |
| 53 | "Load address misaligned", |
| 54 | "Load access fault", |
| 55 | "Store/AMO address misaligned", |
| 56 | "Store/AMO access fault", |
| 57 | "Environment call from U-mode", |
| 58 | "Environment call from S-mode", |
| 59 | "Reserved", |
| 60 | "Environment call from M-mode", |
| 61 | "Instruction page fault", |
| 62 | "Load page fault", |
| 63 | "Reserved", |
| 64 | "Store/AMO page fault", |
| 65 | }; |
| 66 | |
Sean Anderson | e8b46a1 | 2019-12-25 00:27:44 -0500 | [diff] [blame] | 67 | if (code < ARRAY_SIZE(exception_code)) |
| 68 | printf("Unhandled exception: %s\n", exception_code[code]); |
| 69 | else |
| 70 | printf("Unhandled exception code: %ld\n", code); |
Bin Meng | bcc6c74 | 2018-12-12 06:12:44 -0800 | [diff] [blame] | 71 | |
Sean Anderson | e8b46a1 | 2019-12-25 00:27:44 -0500 | [diff] [blame] | 72 | printf("EPC: " REG_FMT " TVAL: " REG_FMT "\n", epc, tval); |
| 73 | show_regs(regs); |
Bin Meng | bcc6c74 | 2018-12-12 06:12:44 -0800 | [diff] [blame] | 74 | hang(); |
| 75 | } |
Rick Chen | 6eedd92 | 2017-12-26 13:55:49 +0800 | [diff] [blame] | 76 | |
| 77 | int interrupt_init(void) |
| 78 | { |
| 79 | return 0; |
| 80 | } |
| 81 | |
| 82 | /* |
| 83 | * enable interrupts |
| 84 | */ |
| 85 | void enable_interrupts(void) |
| 86 | { |
| 87 | } |
| 88 | |
| 89 | /* |
| 90 | * disable interrupts |
| 91 | */ |
| 92 | int disable_interrupts(void) |
| 93 | { |
| 94 | return 0; |
| 95 | } |
| 96 | |
Sean Anderson | e8b46a1 | 2019-12-25 00:27:44 -0500 | [diff] [blame] | 97 | ulong handle_trap(ulong cause, ulong epc, ulong tval, struct pt_regs *regs) |
Rick Chen | 6eedd92 | 2017-12-26 13:55:49 +0800 | [diff] [blame] | 98 | { |
Anup Patel | 89b3934 | 2018-12-03 10:57:40 +0530 | [diff] [blame] | 99 | ulong is_irq, irq; |
| 100 | |
| 101 | is_irq = (cause & MCAUSE_INT); |
| 102 | irq = (cause & ~MCAUSE_INT); |
Rick Chen | 6eedd92 | 2017-12-26 13:55:49 +0800 | [diff] [blame] | 103 | |
Anup Patel | 89b3934 | 2018-12-03 10:57:40 +0530 | [diff] [blame] | 104 | if (is_irq) { |
| 105 | switch (irq) { |
| 106 | case IRQ_M_EXT: |
| 107 | case IRQ_S_EXT: |
| 108 | external_interrupt(0); /* handle external interrupt */ |
| 109 | break; |
| 110 | case IRQ_M_TIMER: |
| 111 | case IRQ_S_TIMER: |
| 112 | timer_interrupt(0); /* handle timer interrupt */ |
| 113 | break; |
| 114 | default: |
Sean Anderson | e8b46a1 | 2019-12-25 00:27:44 -0500 | [diff] [blame] | 115 | _exit_trap(cause, epc, tval, regs); |
Anup Patel | 89b3934 | 2018-12-03 10:57:40 +0530 | [diff] [blame] | 116 | break; |
| 117 | }; |
| 118 | } else { |
Sean Anderson | e8b46a1 | 2019-12-25 00:27:44 -0500 | [diff] [blame] | 119 | _exit_trap(cause, epc, tval, regs); |
Anup Patel | 89b3934 | 2018-12-03 10:57:40 +0530 | [diff] [blame] | 120 | } |
Rick Chen | 6eedd92 | 2017-12-26 13:55:49 +0800 | [diff] [blame] | 121 | |
| 122 | return epc; |
| 123 | } |
| 124 | |
| 125 | /* |
| 126 | *Entry Point for PLIC Interrupt Handler |
| 127 | */ |
| 128 | __attribute__((weak)) void external_interrupt(struct pt_regs *regs) |
| 129 | { |
| 130 | } |
| 131 | |
| 132 | __attribute__((weak)) void timer_interrupt(struct pt_regs *regs) |
| 133 | { |
| 134 | } |