Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 2 | /* |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 3 | * (C) Copyright 2007 Michal Simek |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 4 | * (C) Copyright 2004 Atmark Techno, Inc. |
| 5 | * |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 6 | * Michal SIMEK <monstr@monstr.eu> |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 7 | * Yasushi SHOJI <yashi@atmark-techno.com> |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 8 | */ |
| 9 | |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 10 | #include <common.h> |
| 11 | #include <command.h> |
Michal Simek | cf84885 | 2016-02-15 12:10:32 +0100 | [diff] [blame] | 12 | #include <fdtdec.h> |
Simon Glass | 9b61c7c | 2019-11-14 12:57:41 -0700 | [diff] [blame] | 13 | #include <irq_func.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 14 | #include <log.h> |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 15 | #include <malloc.h> |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 16 | #include <asm/microblaze_intc.h> |
Michal Simek | 77a1e24 | 2007-05-07 17:22:25 +0200 | [diff] [blame] | 17 | #include <asm/asm.h> |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 18 | |
Michal Simek | cf84885 | 2016-02-15 12:10:32 +0100 | [diff] [blame] | 19 | DECLARE_GLOBAL_DATA_PTR; |
| 20 | |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 21 | void enable_interrupts(void) |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 22 | { |
Michal Simek | 056dbe8 | 2015-01-26 15:25:32 +0100 | [diff] [blame] | 23 | debug("Enable interrupts for the whole CPU\n"); |
Michal Simek | 98c1979 | 2007-05-07 23:58:31 +0200 | [diff] [blame] | 24 | MSRSET(0x2); |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 25 | } |
| 26 | |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 27 | int disable_interrupts(void) |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 28 | { |
Michal Simek | c94f95e | 2010-12-21 08:30:39 +0100 | [diff] [blame] | 29 | unsigned int msr; |
| 30 | |
| 31 | MFS(msr, rmsr); |
Michal Simek | 98c1979 | 2007-05-07 23:58:31 +0200 | [diff] [blame] | 32 | MSRCLR(0x2); |
Michal Simek | c94f95e | 2010-12-21 08:30:39 +0100 | [diff] [blame] | 33 | return (msr & 0x2) != 0; |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 34 | } |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 35 | |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 36 | static struct irq_action *vecs; |
| 37 | static u32 irq_no; |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 38 | |
| 39 | /* mapping structure to interrupt controller */ |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 40 | microblaze_intc_t *intc; |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 41 | |
| 42 | /* default handler */ |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 43 | static void def_hdlr(void) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 44 | { |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 45 | puts("def_hdlr\n"); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 46 | } |
| 47 | |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 48 | static void enable_one_interrupt(int irq) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 49 | { |
| 50 | int mask; |
| 51 | int offset = 1; |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 52 | |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 53 | offset <<= irq; |
| 54 | mask = intc->ier; |
| 55 | intc->ier = (mask | offset); |
Michal Simek | baf5175 | 2015-01-26 14:37:52 +0100 | [diff] [blame] | 56 | |
| 57 | debug("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask, |
| 58 | intc->ier); |
| 59 | debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, |
| 60 | intc->iar, intc->mer); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 61 | } |
| 62 | |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 63 | static void disable_one_interrupt(int irq) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 64 | { |
| 65 | int mask; |
| 66 | int offset = 1; |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 67 | |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 68 | offset <<= irq; |
| 69 | mask = intc->ier; |
| 70 | intc->ier = (mask & ~offset); |
Michal Simek | baf5175 | 2015-01-26 14:37:52 +0100 | [diff] [blame] | 71 | |
| 72 | debug("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask, |
| 73 | intc->ier); |
| 74 | debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, |
| 75 | intc->iar, intc->mer); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 76 | } |
| 77 | |
Michal Simek | e76a06e | 2012-06-29 14:21:52 +0200 | [diff] [blame] | 78 | int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, void *arg) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 79 | { |
| 80 | struct irq_action *act; |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 81 | |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 82 | /* irq out of range */ |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 83 | if ((irq < 0) || (irq > irq_no)) { |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 84 | puts("IRQ out of range\n"); |
Michal Simek | e76a06e | 2012-06-29 14:21:52 +0200 | [diff] [blame] | 85 | return -1; |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 86 | } |
| 87 | act = &vecs[irq]; |
| 88 | if (hdlr) { /* enable */ |
| 89 | act->handler = hdlr; |
| 90 | act->arg = arg; |
| 91 | act->count = 0; |
Michal Simek | 5e6c747 | 2015-01-26 14:39:22 +0100 | [diff] [blame] | 92 | enable_one_interrupt(irq); |
Michal Simek | e76a06e | 2012-06-29 14:21:52 +0200 | [diff] [blame] | 93 | return 0; |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 94 | } |
Michal Simek | e76a06e | 2012-06-29 14:21:52 +0200 | [diff] [blame] | 95 | |
| 96 | /* Disable */ |
Michal Simek | 5e6c747 | 2015-01-26 14:39:22 +0100 | [diff] [blame] | 97 | act->handler = (interrupt_handler_t *)def_hdlr; |
Michal Simek | e76a06e | 2012-06-29 14:21:52 +0200 | [diff] [blame] | 98 | act->arg = (void *)irq; |
| 99 | disable_one_interrupt(irq); |
| 100 | return 1; |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 101 | } |
| 102 | |
| 103 | /* initialization interrupt controller - hardware */ |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 104 | static void intc_init(void) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 105 | { |
| 106 | intc->mer = 0; |
| 107 | intc->ier = 0; |
| 108 | intc->iar = 0xFFFFFFFF; |
| 109 | /* XIntc_Start - hw_interrupt enable and all interrupt enable */ |
| 110 | intc->mer = 0x3; |
Michal Simek | baf5175 | 2015-01-26 14:37:52 +0100 | [diff] [blame] | 111 | |
| 112 | debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, |
| 113 | intc->iar, intc->mer); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 114 | } |
| 115 | |
Michal Simek | b78df3d | 2015-01-27 12:44:12 +0100 | [diff] [blame] | 116 | int interrupt_init(void) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 117 | { |
| 118 | int i; |
Michal Simek | cf84885 | 2016-02-15 12:10:32 +0100 | [diff] [blame] | 119 | const void *blob = gd->fdt_blob; |
| 120 | int node = 0; |
| 121 | |
| 122 | debug("INTC: Initialization\n"); |
| 123 | |
| 124 | node = fdt_node_offset_by_compatible(blob, node, |
| 125 | "xlnx,xps-intc-1.00.a"); |
| 126 | if (node != -1) { |
| 127 | fdt_addr_t base = fdtdec_get_addr(blob, node, "reg"); |
| 128 | if (base == FDT_ADDR_T_NONE) |
| 129 | return -1; |
| 130 | |
| 131 | debug("INTC: Base addr %lx\n", base); |
| 132 | intc = (microblaze_intc_t *)base; |
| 133 | irq_no = fdtdec_get_int(blob, node, "xlnx,num-intr-inputs", 0); |
| 134 | debug("INTC: IRQ NO %x\n", irq_no); |
| 135 | } else { |
| 136 | return node; |
| 137 | } |
Michal Simek | c3d51b9 | 2016-02-15 13:44:19 +0100 | [diff] [blame] | 138 | |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 139 | if (irq_no) { |
| 140 | vecs = calloc(1, sizeof(struct irq_action) * irq_no); |
| 141 | if (vecs == NULL) { |
| 142 | puts("Interrupt vector allocation failed\n"); |
| 143 | return -1; |
| 144 | } |
| 145 | |
| 146 | /* initialize irq list */ |
| 147 | for (i = 0; i < irq_no; i++) { |
Michal Simek | 5e6c747 | 2015-01-26 14:39:22 +0100 | [diff] [blame] | 148 | vecs[i].handler = (interrupt_handler_t *)def_hdlr; |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 149 | vecs[i].arg = (void *)i; |
| 150 | vecs[i].count = 0; |
| 151 | } |
| 152 | /* initialize intc controller */ |
| 153 | intc_init(); |
| 154 | enable_interrupts(); |
| 155 | } else { |
| 156 | puts("Undefined interrupt controller\n"); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 157 | } |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 158 | return 0; |
| 159 | } |
| 160 | |
Michal Simek | 8b4bb3a | 2012-06-29 13:27:28 +0200 | [diff] [blame] | 161 | void interrupt_handler(void) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 162 | { |
Michal Simek | 2c00449 | 2010-04-16 11:51:59 +0200 | [diff] [blame] | 163 | int irqs = intc->ivr; /* find active interrupt */ |
| 164 | int mask = 1; |
Michal Simek | 77a1e24 | 2007-05-07 17:22:25 +0200 | [diff] [blame] | 165 | int value; |
Michal Simek | 2c00449 | 2010-04-16 11:51:59 +0200 | [diff] [blame] | 166 | struct irq_action *act = vecs + irqs; |
| 167 | |
Michal Simek | baf5175 | 2015-01-26 14:37:52 +0100 | [diff] [blame] | 168 | debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, |
| 169 | intc->iar, intc->mer); |
| 170 | #ifdef DEBUG |
| 171 | R14(value); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 172 | #endif |
Michal Simek | baf5175 | 2015-01-26 14:37:52 +0100 | [diff] [blame] | 173 | debug("Interrupt handler on %x line, r14 %x\n", irqs, value); |
| 174 | |
| 175 | debug("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n", |
| 176 | (u32)act->handler, act->count, (u32)act->arg); |
Michal Simek | 5e6c747 | 2015-01-26 14:39:22 +0100 | [diff] [blame] | 177 | act->handler(act->arg); |
Michal Simek | 2c00449 | 2010-04-16 11:51:59 +0200 | [diff] [blame] | 178 | act->count++; |
Michal Simek | 77a1e24 | 2007-05-07 17:22:25 +0200 | [diff] [blame] | 179 | |
Stephan Linz | 5db50d6 | 2012-02-22 19:12:43 +0100 | [diff] [blame] | 180 | intc->iar = mask << irqs; |
| 181 | |
Michal Simek | baf5175 | 2015-01-26 14:37:52 +0100 | [diff] [blame] | 182 | debug("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr, |
| 183 | intc->ier, intc->iar, intc->mer); |
| 184 | #ifdef DEBUG |
Michal Simek | 77a1e24 | 2007-05-07 17:22:25 +0200 | [diff] [blame] | 185 | R14(value); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 186 | #endif |
Michal Simek | baf5175 | 2015-01-26 14:37:52 +0100 | [diff] [blame] | 187 | debug("Interrupt handler on %x line, r14 %x\n", irqs, value); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 188 | } |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 189 | |
Jon Loeliger | 526e5ce | 2007-07-09 19:06:00 -0500 | [diff] [blame] | 190 | #if defined(CONFIG_CMD_IRQ) |
Simon Glass | ed38aef | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 191 | int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, const char *argv[]) |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 192 | { |
| 193 | int i; |
| 194 | struct irq_action *act = vecs; |
| 195 | |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 196 | if (irq_no) { |
| 197 | puts("\nInterrupt-Information:\n\n" |
| 198 | "Nr Routine Arg Count\n" |
| 199 | "-----------------------------\n"); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 200 | |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 201 | for (i = 0; i < irq_no; i++) { |
Michal Simek | 5e6c747 | 2015-01-26 14:39:22 +0100 | [diff] [blame] | 202 | if (act->handler != (interrupt_handler_t *)def_hdlr) { |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 203 | printf("%02d %08x %08x %d\n", i, |
Michal Simek | 5e6c747 | 2015-01-26 14:39:22 +0100 | [diff] [blame] | 204 | (int)act->handler, (int)act->arg, |
| 205 | act->count); |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 206 | } |
| 207 | act++; |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 208 | } |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 209 | puts("\n"); |
| 210 | } else { |
| 211 | puts("Undefined interrupt controller\n"); |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 212 | } |
Michal Simek | 251ed2c | 2012-07-10 10:31:31 +0200 | [diff] [blame] | 213 | return 0; |
Michal Simek | 922ce20 | 2007-03-11 13:48:24 +0100 | [diff] [blame] | 214 | } |
| 215 | #endif |