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git01.mediatek.com / filogic / uboot / 32c25c80bf49970528f92bf8682b81e4e70a6d59 / . / arch / arm / dts / rk3399-pinephone-pro.dts
blob: 04403a76238b83358957c00663d314074687c466 [file] [log] [blame]
Peter Robinson9c1f7892022-12-31 09:23:59 +0000[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 Martijn Braam <martijn@brixit.nl>
4 * Copyright (c) 2021 Kamil Trzciński <ayufan@ayufan.eu>
5 */
6
7/*
8 * PinePhone Pro datasheet:
9 * https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf
10 */
11
12/dts-v1/;
13#include <dt-bindings/input/linux-event-codes.h>
14#include "rk3399.dtsi"
15#include "rk3399-opp.dtsi"
16
17/ {
18 model = "Pine64 PinePhonePro";
19 compatible = "pine64,pinephone-pro", "rockchip,rk3399";
20 chassis-type = "handset";
21
22 aliases {
23 mmc0 = &sdio0;
24 mmc1 = &sdmmc;
25 mmc2 = &sdhci;
26 };
27
28 chosen {
29 stdout-path = "serial2:115200n8";
30 };
31
32 gpio-keys {
33 compatible = "gpio-keys";
34 pinctrl-names = "default";
35 pinctrl-0 = <&pwrbtn_pin>;
36
37 key-power {
38 debounce-interval = <20>;
39 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
40 label = "Power";
41 linux,code = <KEY_POWER>;
42 wakeup-source;
43 };
44 };
45
46 vcc_sys: vcc-sys-regulator {
47 compatible = "regulator-fixed";
48 regulator-name = "vcc_sys";
49 regulator-always-on;
50 regulator-boot-on;
51 };
52
53 vcc3v3_sys: vcc3v3-sys-regulator {
54 compatible = "regulator-fixed";
55 regulator-name = "vcc3v3_sys";
56 regulator-always-on;
57 regulator-boot-on;
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
60 vin-supply = <&vcc_sys>;
61 };
62
63 vcca1v8_s3: vcc1v8-s3-regulator {
64 compatible = "regulator-fixed";
65 regulator-name = "vcca1v8_s3";
66 regulator-min-microvolt = <1800000>;
67 regulator-max-microvolt = <1800000>;
68 vin-supply = <&vcc3v3_sys>;
69 regulator-always-on;
70 regulator-boot-on;
71 };
72
73 vcc1v8_codec: vcc1v8-codec-regulator {
74 compatible = "regulator-fixed";
75 enable-active-high;
76 gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
77 pinctrl-names = "default";
78 pinctrl-0 = <&vcc1v8_codec_en>;
79 regulator-name = "vcc1v8_codec";
80 regulator-min-microvolt = <1800000>;
81 regulator-max-microvolt = <1800000>;
82 vin-supply = <&vcc3v3_sys>;
83 };
84
85 wifi_pwrseq: sdio-wifi-pwrseq {
86 compatible = "mmc-pwrseq-simple";
87 clocks = <&rk818 1>;
88 clock-names = "ext_clock";
89 pinctrl-names = "default";
90 pinctrl-0 = <&wifi_enable_h_pin>;
91 /*
92 * Wait between power-on and SDIO access for CYP43455
93 * POR circuit.
94 */
95 post-power-on-delay-ms = <110>;
96 /*
97 * Wait between consecutive toggles for CYP43455 CBUCK
98 * regulator discharge.
99 */
100 power-off-delay-us = <10000>;
101
102 /* WL_REG_ON on module */
103 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
104 };
105};
106
107&cpu_l0 {
108 cpu-supply = <&vdd_cpu_l>;
109};
110
111&cpu_l1 {
112 cpu-supply = <&vdd_cpu_l>;
113};
114
115&cpu_l2 {
116 cpu-supply = <&vdd_cpu_l>;
117};
118
119&cpu_l3 {
120 cpu-supply = <&vdd_cpu_l>;
121};
122
123&cpu_b0 {
124 cpu-supply = <&vdd_cpu_b>;
125};
126
127&cpu_b1 {
128 cpu-supply = <&vdd_cpu_b>;
129};
130
131&emmc_phy {
132 status = "okay";
133};
134
135&i2c0 {
136 clock-frequency = <400000>;
137 i2c-scl-rising-time-ns = <168>;
138 i2c-scl-falling-time-ns = <4>;
139 status = "okay";
140
141 rk818: pmic@1c {
142 compatible = "rockchip,rk818";
143 reg = <0x1c>;
144 interrupt-parent = <&gpio1>;
145 interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>;
146 #clock-cells = <1>;
147 clock-output-names = "xin32k", "rk808-clkout2";
148 pinctrl-names = "default";
149 pinctrl-0 = <&pmic_int_l>;
150 rockchip,system-power-controller;
151 wakeup-source;
152
153 vcc1-supply = <&vcc_sys>;
154 vcc2-supply = <&vcc_sys>;
155 vcc3-supply = <&vcc_sys>;
156 vcc4-supply = <&vcc_sys>;
157 vcc6-supply = <&vcc_sys>;
158 vcc7-supply = <&vcc3v3_sys>;
159 vcc8-supply = <&vcc_sys>;
160 vcc9-supply = <&vcc3v3_sys>;
161
162 regulators {
163 vdd_cpu_l: DCDC_REG1 {
164 regulator-name = "vdd_cpu_l";
165 regulator-always-on;
166 regulator-boot-on;
167 regulator-min-microvolt = <875000>;
168 regulator-max-microvolt = <975000>;
169 regulator-ramp-delay = <6001>;
170 regulator-state-mem {
171 regulator-off-in-suspend;
172 };
173 };
174
175 vdd_center: DCDC_REG2 {
176 regulator-name = "vdd_center";
177 regulator-always-on;
178 regulator-boot-on;
179 regulator-min-microvolt = <800000>;
180 regulator-max-microvolt = <1000000>;
181 regulator-ramp-delay = <6001>;
182 regulator-state-mem {
183 regulator-off-in-suspend;
184 };
185 };
186
187 vcc_ddr: DCDC_REG3 {
188 regulator-name = "vcc_ddr";
189 regulator-always-on;
190 regulator-boot-on;
191 regulator-state-mem {
192 regulator-on-in-suspend;
193 };
194 };
195
196 vcc_1v8: DCDC_REG4 {
197 regulator-name = "vcc_1v8";
198 regulator-always-on;
199 regulator-boot-on;
200 regulator-min-microvolt = <1800000>;
201 regulator-max-microvolt = <1800000>;
202 regulator-state-mem {
203 regulator-on-in-suspend;
204 };
205 };
206
207 vcca3v0_codec: LDO_REG1 {
208 regulator-name = "vcca3v0_codec";
209 regulator-min-microvolt = <3000000>;
210 regulator-max-microvolt = <3000000>;
211 };
212
213 vcc3v0_touch: LDO_REG2 {
214 regulator-name = "vcc3v0_touch";
215 regulator-min-microvolt = <3000000>;
216 regulator-max-microvolt = <3000000>;
217 };
218
219 vcca1v8_codec: LDO_REG3 {
220 regulator-name = "vcca1v8_codec";
221 regulator-min-microvolt = <1800000>;
222 regulator-max-microvolt = <1800000>;
223 };
224
225 rk818_pwr_on: LDO_REG4 {
226 regulator-name = "rk818_pwr_on";
227 regulator-always-on;
228 regulator-boot-on;
229 regulator-min-microvolt = <3300000>;
230 regulator-max-microvolt = <3300000>;
231 regulator-state-mem {
232 regulator-on-in-suspend;
233 };
234 };
235
236 vcc_3v0: LDO_REG5 {
237 regulator-name = "vcc_3v0";
238 regulator-always-on;
239 regulator-boot-on;
240 regulator-min-microvolt = <3000000>;
241 regulator-max-microvolt = <3000000>;
242 regulator-state-mem {
243 regulator-on-in-suspend;
244 };
245 };
246
247 vcc_1v5: LDO_REG6 {
248 regulator-name = "vcc_1v5";
249 regulator-always-on;
250 regulator-boot-on;
251 regulator-min-microvolt = <1500000>;
252 regulator-max-microvolt = <1500000>;
253 regulator-state-mem {
254 regulator-on-in-suspend;
255 };
256 };
257
258 vcc1v8_dvp: LDO_REG7 {
259 regulator-name = "vcc1v8_dvp";
260 regulator-min-microvolt = <1800000>;
261 regulator-max-microvolt = <1800000>;
262 };
263
264 vcc3v3_s3: LDO_REG8 {
265 regulator-name = "vcc3v3_s3";
266 regulator-always-on;
267 regulator-boot-on;
268 regulator-min-microvolt = <3300000>;
269 regulator-max-microvolt = <3300000>;
270 regulator-state-mem {
271 regulator-off-in-suspend;
272 };
273 };
274
275 vccio_sd: LDO_REG9 {
276 regulator-name = "vccio_sd";
277 regulator-min-microvolt = <1800000>;
278 regulator-max-microvolt = <3300000>;
279 };
280
281 vcc3v3_s0: SWITCH_REG {
282 regulator-name = "vcc3v3_s0";
283 regulator-always-on;
284 regulator-boot-on;
285 regulator-state-mem {
286 regulator-on-in-suspend;
287 };
288 };
289 };
290 };
291
292 vdd_cpu_b: regulator@40 {
293 compatible = "silergy,syr827";
294 reg = <0x40>;
295 fcs,suspend-voltage-selector = <1>;
296 pinctrl-names = "default";
297 pinctrl-0 = <&vsel1_pin>;
298 regulator-name = "vdd_cpu_b";
299 regulator-min-microvolt = <875000>;
300 regulator-max-microvolt = <1150000>;
301 regulator-ramp-delay = <1000>;
302 regulator-always-on;
303 regulator-boot-on;
304
305 regulator-state-mem {
306 regulator-off-in-suspend;
307 };
308 };
309
310 vdd_gpu: regulator@41 {
311 compatible = "silergy,syr828";
312 reg = <0x41>;
313 fcs,suspend-voltage-selector = <1>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&vsel2_pin>;
316 regulator-name = "vdd_gpu";
317 regulator-min-microvolt = <875000>;
318 regulator-max-microvolt = <975000>;
319 regulator-ramp-delay = <1000>;
320 regulator-always-on;
321 regulator-boot-on;
322
323 regulator-state-mem {
324 regulator-off-in-suspend;
325 };
326 };
327};
328
329&cluster0_opp {
330 opp04 {
331 status = "disabled";
332 };
333
334 opp05 {
335 status = "disabled";
336 };
337};
338
339&cluster1_opp {
340 opp06 {
341 opp-hz = /bits/ 64 <1500000000>;
342 opp-microvolt = <1100000 1100000 1150000>;
343 };
344
345 opp07 {
346 status = "disabled";
347 };
348};
349
350&io_domains {
351 bt656-supply = <&vcc1v8_dvp>;
352 audio-supply = <&vcca1v8_codec>;
353 sdmmc-supply = <&vccio_sd>;
354 gpio1830-supply = <&vcc_3v0>;
355 status = "okay";
356};
357
358&pmu_io_domains {
359 pmu1830-supply = <&vcc_1v8>;
360 status = "okay";
361};
362
363&pinctrl {
364 buttons {
365 pwrbtn_pin: pwrbtn-pin {
366 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
367 };
368 };
369
370 pmic {
371 pmic_int_l: pmic-int-l {
372 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
373 };
374
375 vsel1_pin: vsel1-pin {
376 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
377 };
378
379 vsel2_pin: vsel2-pin {
380 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
381 };
382 };
383
384 sdio-pwrseq {
385 wifi_enable_h_pin: wifi-enable-h-pin {
386 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
387 };
388 };
389
390 sound {
391 vcc1v8_codec_en: vcc1v8-codec-en {
392 rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
393 };
394 };
395
396 wireless-bluetooth {
397 bt_wake_pin: bt-wake-pin {
398 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
399 };
400
401 bt_host_wake_pin: bt-host-wake-pin {
402 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
403 };
404
405 bt_reset_pin: bt-reset-pin {
406 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
407 };
408 };
409};
410
411&sdio0 {
412 bus-width = <4>;
413 cap-sd-highspeed;
414 cap-sdio-irq;
415 disable-wp;
416 keep-power-in-suspend;
417 mmc-pwrseq = <&wifi_pwrseq>;
418 non-removable;
419 pinctrl-names = "default";
420 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
421 sd-uhs-sdr104;
422 status = "okay";
423};
424
425&sdmmc {
426 bus-width = <4>;
427 cap-sd-highspeed;
428 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
429 disable-wp;
430 max-frequency = <150000000>;
431 pinctrl-names = "default";
432 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
433 vmmc-supply = <&vcc3v3_sys>;
434 vqmmc-supply = <&vccio_sd>;
435 status = "okay";
436};
437
438&sdhci {
439 bus-width = <8>;
440 mmc-hs200-1_8v;
441 non-removable;
442 status = "okay";
443};
444
445&tsadc {
446 rockchip,hw-tshut-mode = <1>;
447 rockchip,hw-tshut-polarity = <1>;
448 status = "okay";
449};
450
451&uart0 {
452 pinctrl-names = "default";
453 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
454 uart-has-rtscts;
455 status = "okay";
456
457 bluetooth {
458 compatible = "brcm,bcm4345c5";
459 clocks = <&rk818 1>;
460 clock-names = "lpo";
461 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
462 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
463 max-speed = <1500000>;
464 pinctrl-names = "default";
465 pinctrl-0 = <&bt_host_wake_pin &bt_wake_pin &bt_reset_pin>;
466 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
467 vbat-supply = <&vcc3v3_sys>;
468 vddio-supply = <&vcc_1v8>;
469 };
470};
471
472&uart2 {
473 status = "okay";
474};