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Patrick Delaunaye7f435d2018-07-09 15:17:22 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
6/dts-v1/;
7
8#include "stm32mp157c-ed1.dts"
9
10/ {
11 model = "STMicroelectronics STM32MP157C eval daughter on eval mother";
12 compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
13
Patrice Chotard00442d02019-02-12 16:50:38 +010014 chosen {
15 stdout-path = "serial0:115200n8";
16 };
17
18 aliases {
19 serial0 = &uart4;
20 ethernet0 = &ethernet0;
21 };
22
23 panel_backlight: panel-backlight {
24 compatible = "gpio-backlight";
25 gpios = <&gpiod 13 GPIO_ACTIVE_LOW>;
26 default-on;
27 status = "okay";
28 };
Patrick Delaunaye7f435d2018-07-09 15:17:22 +020029};
30
31&cec {
32 pinctrl-names = "default";
33 pinctrl-0 = <&cec_pins_a>;
34 status = "okay";
Patrice Chotard00442d02019-02-12 16:50:38 +010035};
36
37&dsi {
38 #address-cells = <1>;
39 #size-cells = <0>;
40 status = "okay";
41
42 ports {
43 #address-cells = <1>;
44 #size-cells = <0>;
45
46 port@0 {
47 reg = <0>;
48 dsi_in: endpoint {
49 remote-endpoint = <&ltdc_ep0_out>;
50 };
51 };
52
53 port@1 {
54 reg = <1>;
55 dsi_out: endpoint {
56 remote-endpoint = <&dsi_panel_in>;
57 };
58 };
59 };
60
61 panel-dsi@0 {
62 compatible = "raydium,rm68200";
63 reg = <0>;
64 reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>;
65 backlight = <&panel_backlight>;
66 status = "okay";
67
68 port {
69 dsi_panel_in: endpoint {
70 remote-endpoint = <&dsi_out>;
71 };
72 };
73 };
74};
75
76&ethernet0 {
77 status = "okay";
78 pinctrl-0 = <&ethernet0_rgmii_pins_a>;
79 pinctrl-1 = <&ethernet0_rgmii_pins_sleep_a>;
80 pinctrl-names = "default", "sleep";
Christophe Roullier32ac3052019-05-17 15:08:45 +020081 phy-mode = "rgmii-id";
Patrice Chotard00442d02019-02-12 16:50:38 +010082 max-speed = <1000>;
83 phy-handle = <&phy0>;
84
85 mdio0 {
86 #address-cells = <1>;
87 #size-cells = <0>;
88 compatible = "snps,dwmac-mdio";
89 phy0: ethernet-phy@0 {
90 reg = <0>;
91 };
92 };
Patrick Delaunaye7f435d2018-07-09 15:17:22 +020093};
94
Patrick Delaunaye0188ac2019-04-08 15:30:52 +020095&fmc {
96 pinctrl-names = "default", "sleep";
97 pinctrl-0 = <&fmc_pins_a>;
98 pinctrl-1 = <&fmc_sleep_pins_a>;
99 status = "okay";
100 #address-cells = <1>;
101 #size-cells = <0>;
102
103 nand: nand@0 {
104 reg = <0>;
105 nand-on-flash-bbt;
106 #address-cells = <1>;
107 #size-cells = <1>;
108 };
109};
110
Patrick Delaunaye7f435d2018-07-09 15:17:22 +0200111&i2c2 {
112 pinctrl-names = "default";
113 pinctrl-0 = <&i2c2_pins_a>;
114 i2c-scl-rising-time-ns = <185>;
115 i2c-scl-falling-time-ns = <20>;
116 status = "okay";
Patrick Delaunay1b58b552019-04-12 14:38:28 +0200117
118 stmfx: stmfx@42 {
119 compatible = "st,stmfx-0300";
120 reg = <0x42>;
121 interrupts = <8 IRQ_TYPE_EDGE_RISING>;
122 interrupt-parent = <&gpioi>;
123 vdd-supply = <&v3v3>;
124
125 stmfx_pinctrl: stmfx-pin-controller {
126 compatible = "st,stmfx-0300-pinctrl";
127 gpio-controller;
128 #gpio-cells = <2>;
129 interrupt-controller;
130 #interrupt-cells = <2>;
131 gpio-ranges = <&stmfx_pinctrl 0 0 24>;
132 status = "disabled";
133 };
134 };
Patrick Delaunaye7f435d2018-07-09 15:17:22 +0200135};
136
137&i2c5 {
138 pinctrl-names = "default";
139 pinctrl-0 = <&i2c5_pins_a>;
140 i2c-scl-rising-time-ns = <185>;
141 i2c-scl-falling-time-ns = <20>;
142 status = "okay";
143};
144
Patrice Chotard00442d02019-02-12 16:50:38 +0100145&ltdc {
146 status = "okay";
147
148 port {
149 #address-cells = <1>;
150 #size-cells = <0>;
151
152 ltdc_ep0_out: endpoint@0 {
153 reg = <0>;
154 remote-endpoint = <&dsi_in>;
155 };
156 };
157};
158
159&m_can1 {
160 pinctrl-names = "default";
161 pinctrl-0 = <&m_can1_pins_a>;
162 status = "okay";
163};
164
Patrick Delaunaye7f435d2018-07-09 15:17:22 +0200165&qspi {
166 pinctrl-names = "default";
167 pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a &qspi_bk2_pins_a>;
168 reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
169 #address-cells = <1>;
170 #size-cells = <0>;
171 status = "okay";
172
173 flash0: mx66l51235l@0 {
174 reg = <0>;
175 spi-rx-bus-width = <4>;
176 spi-max-frequency = <108000000>;
177 #address-cells = <1>;
178 #size-cells = <1>;
179 };
180
181 flash1: mx66l51235l@1 {
182 reg = <1>;
183 spi-rx-bus-width = <4>;
184 spi-max-frequency = <108000000>;
185 #address-cells = <1>;
186 #size-cells = <1>;
187 };
188};
189
Patrice Chotard00442d02019-02-12 16:50:38 +0100190&spi1 {
191 pinctrl-names = "default";
192 pinctrl-0 = <&spi1_pins_a>;
193 status = "disabled";
194};
195
Patrick Delaunaye7f435d2018-07-09 15:17:22 +0200196&timers2 {
197 status = "disabled";
198 pwm {
199 pinctrl-0 = <&pwm2_pins_a>;
200 pinctrl-names = "default";
201 status = "okay";
202 };
203 timer@1 {
204 status = "okay";
205 };
206};
207
208&timers8 {
209 status = "disabled";
210 pwm {
211 pinctrl-0 = <&pwm8_pins_a>;
212 pinctrl-names = "default";
213 status = "okay";
214 };
215 timer@7 {
216 status = "okay";
217 };
218};
219
220&timers12 {
221 status = "disabled";
222 pwm {
223 pinctrl-0 = <&pwm12_pins_a>;
224 pinctrl-names = "default";
225 status = "okay";
226 };
227 timer@11 {
228 status = "okay";
229 };
230};
231
Patrice Chotardf7a5edc2018-08-10 17:12:12 +0200232&usbh_ehci {
233 phys = <&usbphyc_port0>;
234 phy-names = "usb";
235 vbus-supply = <&vbus_sw>;
236 status = "okay";
237};
238
Patrice Chotard18cb6f52018-08-10 17:12:11 +0200239&usbotg_hs {
240 pinctrl-names = "default";
241 pinctrl-0 = <&usbotg_hs_pins_a>;
Patrice Chotard00442d02019-02-12 16:50:38 +0100242 dr_mode = "peripheral";
Patrice Chotard18cb6f52018-08-10 17:12:11 +0200243 phys = <&usbphyc_port1 0>;
244 phy-names = "usb2-phy";
245 status = "okay";
246};
247
Patrick Delaunaye7f435d2018-07-09 15:17:22 +0200248&usbphyc {
249 status = "okay";
250};