Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 3263e748a19043c290316fe7d2aefa15c2866dcb / . / configs / kmtepr2_defconfig
blob: 36d02e151efe47c9aeb4cfd7fc3fa1260ec22a4b [file] [log] [blame]
Christoph Dietrich4c1c6ae2015-11-17 10:53:24 +0100[diff] [blame]1CONFIG_PPC=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0xF0000000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]3CONFIG_ENV_SIZE=0x4000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]4CONFIG_ENV_SECT_SIZE=0x20000
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]5CONFIG_BOOTCOUNT_BOOTLIMIT=3
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]6CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
Mario Sixd10f3182019-01-21 09:17:53 +0100[diff] [blame]7CONFIG_SYS_CLK_FREQ=66000000
Christoph Dietrich4c1c6ae2015-11-17 10:53:24 +0100[diff] [blame]8CONFIG_MPC83xx=y
Mario Six4a50e562019-01-21 09:17:56 +0100[diff] [blame]9CONFIG_HIGH_BATS=y
Mario Six190ab402019-01-21 09:17:33 +0100[diff] [blame]10CONFIG_TARGET_KMTEPR2=y
Mario Six94867102019-01-21 09:17:54 +0100[diff] [blame]11CONFIG_CORE_PLL_RATIO_25_1=y
12CONFIG_QUICC_MULT_FACTOR_3=y
13CONFIG_BOOT_MEMORY_SPACE_LOW=y
14CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]15CONFIG_BAT0=y
16CONFIG_BAT0_NAME="SDRAM"
17CONFIG_BAT0_BASE=0x00000000
18CONFIG_BAT0_LENGTH_256_MBYTES=y
19CONFIG_BAT0_ACCESS_RW=y
20CONFIG_BAT0_ICACHE_INHIBITED=y
21CONFIG_BAT0_ICACHE_GUARDED=y
22CONFIG_BAT0_DCACHE_INHIBITED=y
23CONFIG_BAT0_DCACHE_GUARDED=y
24CONFIG_BAT0_USER_MODE_VALID=y
25CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
26CONFIG_BAT1=y
27CONFIG_BAT1_NAME="IMMR"
28CONFIG_BAT1_BASE=0xE0000000
29CONFIG_BAT1_LENGTH_4_MBYTES=y
30CONFIG_BAT1_ACCESS_RW=y
31CONFIG_BAT1_ICACHE_INHIBITED=y
32CONFIG_BAT1_ICACHE_GUARDED=y
33CONFIG_BAT1_DCACHE_INHIBITED=y
34CONFIG_BAT1_DCACHE_GUARDED=y
35CONFIG_BAT1_USER_MODE_VALID=y
36CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
37CONFIG_BAT2=y
38CONFIG_BAT2_NAME="KMBEC_FPGA"
39CONFIG_BAT2_BASE=0xE8000000
40CONFIG_BAT2_LENGTH_128_MBYTES=y
41CONFIG_BAT2_ACCESS_RW=y
42CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
43CONFIG_BAT2_DCACHE_INHIBITED=y
44CONFIG_BAT2_DCACHE_GUARDED=y
45CONFIG_BAT2_USER_MODE_VALID=y
46CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
47CONFIG_BAT3=y
48CONFIG_BAT3_NAME="FLASH"
49CONFIG_BAT3_BASE=0xF0000000
50CONFIG_BAT3_LENGTH_256_MBYTES=y
51CONFIG_BAT3_ACCESS_RW=y
52CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
53CONFIG_BAT3_DCACHE_INHIBITED=y
54CONFIG_BAT3_DCACHE_GUARDED=y
55CONFIG_BAT3_USER_MODE_VALID=y
56CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
57CONFIG_BAT4=y
58CONFIG_BAT4_NAME="STACK_IN_DCACHE"
59CONFIG_BAT4_BASE=0xE6000000
60CONFIG_BAT4_ACCESS_RW=y
61CONFIG_BAT4_USER_MODE_VALID=y
62CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
63CONFIG_BAT5=y
64CONFIG_BAT5_NAME="APP1"
65CONFIG_BAT5_BASE=0xA0000000
66CONFIG_BAT5_LENGTH_256_MBYTES=y
67CONFIG_BAT5_ACCESS_RW=y
68CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
69CONFIG_BAT5_DCACHE_INHIBITED=y
70CONFIG_BAT5_DCACHE_GUARDED=y
71CONFIG_BAT5_USER_MODE_VALID=y
72CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
73CONFIG_BAT6=y
74CONFIG_BAT6_NAME="APP2"
75CONFIG_BAT6_BASE=0xB0000000
76CONFIG_BAT6_LENGTH_256_MBYTES=y
77CONFIG_BAT6_ACCESS_RW=y
78CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
79CONFIG_BAT6_DCACHE_INHIBITED=y
80CONFIG_BAT6_DCACHE_GUARDED=y
81CONFIG_BAT6_USER_MODE_VALID=y
82CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
Mario Sixb47839c2019-01-21 09:17:58 +0100[diff] [blame]83CONFIG_LBLAW0=y
84CONFIG_LBLAW0_BASE=0xF0000000
85CONFIG_LBLAW0_NAME="FLASH"
86CONFIG_LBLAW0_LENGTH_256_MBYTES=y
87CONFIG_LBLAW1=y
88CONFIG_LBLAW1_BASE=0xE8000000
89CONFIG_LBLAW1_NAME="KMBEC_FPGA"
90CONFIG_LBLAW1_LENGTH_128_MBYTES=y
91CONFIG_LBLAW2=y
92CONFIG_LBLAW2_BASE=0xA0000000
93CONFIG_LBLAW2_NAME="APP1"
94CONFIG_LBLAW2_LENGTH_256_MBYTES=y
95CONFIG_LBLAW3=y
96CONFIG_LBLAW3_BASE=0xB0000000
97CONFIG_LBLAW3_NAME="APP2"
98CONFIG_LBLAW3_LENGTH_256_MBYTES=y
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]99CONFIG_ELBC_BR0_OR0=y
100CONFIG_BR0_OR0_NAME="FLASH"
101CONFIG_BR0_OR0_BASE=0xF0000000
102CONFIG_BR0_PORTSIZE_16BIT=y
103CONFIG_OR0_AM_256_MBYTES=y
104CONFIG_OR0_SCY_5=y
105CONFIG_OR0_CSNT_EARLIER=y
106CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
107CONFIG_OR0_TRLX_RELAXED=y
108CONFIG_OR0_EAD_EXTRA=y
109CONFIG_ELBC_BR1_OR1=y
110CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
111CONFIG_BR1_OR1_BASE=0xE8000000
112CONFIG_OR1_AM_128_MBYTES=y
113CONFIG_OR1_SCY_2=y
114CONFIG_OR1_CSNT_EARLIER=y
115CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
116CONFIG_OR1_TRLX_RELAXED=y
117CONFIG_OR1_EAD_EXTRA=y
118CONFIG_ELBC_BR2_OR2=y
119CONFIG_BR2_OR2_NAME="APP1"
120CONFIG_BR2_OR2_BASE=0xA0000000
121CONFIG_OR2_AM_256_MBYTES=y
122CONFIG_OR2_SCY_2=y
123CONFIG_OR2_CSNT_EARLIER=y
124CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y
125CONFIG_OR2_TRLX_RELAXED=y
126CONFIG_OR2_EAD_EXTRA=y
127CONFIG_ELBC_BR3_OR3=y
128CONFIG_BR3_OR3_NAME="APP2"
129CONFIG_BR3_OR3_BASE=0xB0000000
130CONFIG_BR3_PORTSIZE_16BIT=y
131CONFIG_OR3_AM_256_MBYTES=y
132CONFIG_OR3_SCY_4=y
Mario Six8b2141c2019-01-21 09:18:09 +0100[diff] [blame]133CONFIG_HID0_FINAL_EMCP=y
134CONFIG_HID0_FINAL_ICE=y
135CONFIG_HID2_HBE=y
Mario Sixaa502542019-01-21 09:18:12 +0100[diff] [blame]136CONFIG_ACR_PIPE_DEP_4=y
137CONFIG_ACR_RPTCNT_4=y
138CONFIG_ACR_APARK_MASTER=y
139CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]140CONFIG_LCRR_EADC_1=y
141CONFIG_LCRR_CLKDIV_2=y
Holger Brunckf31ba7f2019-11-25 10:04:34 +0100[diff] [blame]142# CONFIG_SYS_MALLOC_F is not set
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]143CONFIG_OF_BOARD_SETUP=y
144CONFIG_OF_STDOUT_VIA_ALIAS=y
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]145CONFIG_MISC_INIT_R=y
Heiko Schocher20ea7ab2016-09-09 08:12:49 +0200[diff] [blame]146CONFIG_VERSION_VARIABLE=y
Mario Six75b23ed2018-03-28 14:38:15 +0200[diff] [blame]147CONFIG_BOARD_EARLY_INIT_R=y
Mario Six8febc7a2018-03-28 14:38:16 +0200[diff] [blame]148CONFIG_LAST_STAGE_INIT=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]149CONFIG_HUSH_PARSER=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]150CONFIG_AUTOBOOT_KEYED=y
151CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
152CONFIG_AUTOBOOT_STOP_STR=" "
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]153CONFIG_CMD_IMLS=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]154CONFIG_CMD_ASKENV=y
155CONFIG_CMD_GREPENV=y
Simon Glass4590d4e2017-05-17 03:25:10 -0600[diff] [blame]156CONFIG_CMD_EEPROM=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]157CONFIG_CMD_I2C=y
158CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]159CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]160CONFIG_CMD_PING=y
Simon Glassc4abb4b2017-05-17 03:25:37 -0600[diff] [blame]161CONFIG_CMD_JFFS2=y
Tom Rini2b62b912018-11-13 19:54:45 -0500[diff] [blame]162CONFIG_CMD_MTDPARTS=y
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]163CONFIG_MTDIDS_DEFAULT="nor0=boot"
164CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);"
Heiko Schocher09dbb852016-09-21 07:58:19 +0200[diff] [blame]165CONFIG_CMD_UBI=y
Tom Rinic20bb732017-07-22 18:36:16 -0400[diff] [blame]166# CONFIG_CMD_UBIFS is not set
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]167CONFIG_ENV_OVERWRITE=y
Tom Rini4bb26a42019-11-10 11:28:03 -0500[diff] [blame]168CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]169CONFIG_ENV_ADDR=0xF00C0000
170CONFIG_ENV_ADDR_REDUND=0xF00E0000
Holger Brunckf31ba7f2019-11-25 10:04:34 +0100[diff] [blame]171CONFIG_DM=y
Lukasz Majewski6dd8c902018-02-09 23:50:57 +0100[diff] [blame]172CONFIG_BOOTCOUNT_LIMIT=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]173# CONFIG_MMC is not set
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]174CONFIG_MTD=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]175CONFIG_MTD_NOR_FLASH=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]176CONFIG_FLASH_CFI_DRIVER=y
177CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
178CONFIG_FLASH_CFI_MTD=y
179CONFIG_SYS_FLASH_PROTECTION=y
180CONFIG_SYS_FLASH_CFI=y
Tom Rinif48e0252016-10-26 17:15:37 -0400[diff] [blame]181# CONFIG_PCI is not set
Tom Rinifa911f82019-05-12 07:59:12 -0400[diff] [blame]182CONFIG_QE=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]183CONFIG_SYS_NS16550=y
Simon Glassa66c5412016-02-22 22:55:42 -0700[diff] [blame]184CONFIG_OF_LIBFDT=y