blob: ca627728743b8b74407b2b42703180ef8f1102d2 [file] [log] [blame]
Neil Armstrongadd986c2018-07-24 17:45:28 +02001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Amlogic Meson Video Processing Unit driver
4 *
5 * Copyright (c) 2018 BayLibre, SAS.
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 */
8
Simon Glassf74c7bd2019-10-27 09:54:03 -06009#include <display.h>
10#include <dm.h>
Neil Armstrongadd986c2018-07-24 17:45:28 +020011#include <efi_loader.h>
Neil Armstrongadd986c2018-07-24 17:45:28 +020012#include <fdt_support.h>
Simon Glass0f2af882020-05-10 11:40:05 -060013#include <log.h>
Simon Glass655306c2020-05-10 11:39:58 -060014#include <part.h>
Neil Armstrongadd986c2018-07-24 17:45:28 +020015#include <linux/sizes.h>
16#include <asm/arch/mem.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060017#include <asm/global_data.h>
Simon Glassf74c7bd2019-10-27 09:54:03 -060018#include <dm/device-internal.h>
19#include <dm/uclass-internal.h>
20
21#include "meson_vpu.h"
Neil Armstrongadd986c2018-07-24 17:45:28 +020022#include "meson_registers.h"
23#include "simplefb_common.h"
24
25#define MESON_VPU_OVERSCAN SZ_64K
26
27/* Static variable for use in meson_vpu_rsv_fb() */
28static struct meson_framebuffer {
29 u64 base;
30 u64 fb_size;
31 unsigned int xsize;
32 unsigned int ysize;
33 bool is_cvbs;
34} meson_fb = { 0 };
35
Simon Glassf74c7bd2019-10-27 09:54:03 -060036bool meson_vpu_is_compatible(struct meson_vpu_priv *priv,
37 enum vpu_compatible family)
38{
39 enum vpu_compatible compat = dev_get_driver_data(priv->dev);
40
41 return compat == family;
42}
43
Neil Armstrongadd986c2018-07-24 17:45:28 +020044static int meson_vpu_setup_mode(struct udevice *dev, struct udevice *disp)
45{
Simon Glassb75b15b2020-12-03 16:55:23 -070046 struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
Neil Armstrongadd986c2018-07-24 17:45:28 +020047 struct video_priv *uc_priv = dev_get_uclass_priv(dev);
48 struct display_timing timing;
49 bool is_cvbs = false;
50 int ret = 0;
51
52 if (disp) {
53 ret = display_read_timing(disp, &timing);
54 if (ret) {
55 debug("%s: Failed to read timings\n", __func__);
56 goto cvbs;
57 }
58
59 uc_priv->xsize = timing.hactive.typ;
60 uc_priv->ysize = timing.vactive.typ;
61
62 ret = display_enable(disp, 0, &timing);
63 if (ret)
64 goto cvbs;
65 } else {
66cvbs:
67 /* CVBS has a fixed 720x480i (NTSC) and 720x576i (PAL) */
68 is_cvbs = true;
69 timing.flags = DISPLAY_FLAGS_INTERLACED;
70 uc_priv->xsize = 720;
71 uc_priv->ysize = 576;
72 }
73
74 uc_priv->bpix = VPU_MAX_LOG2_BPP;
75
76 meson_fb.is_cvbs = is_cvbs;
77 meson_fb.xsize = uc_priv->xsize;
78 meson_fb.ysize = uc_priv->ysize;
79
80 /* Move the framebuffer to the end of addressable ram */
81 meson_fb.fb_size = ALIGN(meson_fb.xsize * meson_fb.ysize *
82 ((1 << VPU_MAX_LOG2_BPP) / 8) +
83 MESON_VPU_OVERSCAN, EFI_PAGE_SIZE);
84 meson_fb.base = gd->bd->bi_dram[0].start +
85 gd->bd->bi_dram[0].size - meson_fb.fb_size;
86
87 /* Override the framebuffer address */
88 uc_plat->base = meson_fb.base;
89
90 meson_vpu_setup_plane(dev, timing.flags & DISPLAY_FLAGS_INTERLACED);
91 meson_vpu_setup_venc(dev, &timing, is_cvbs);
92 meson_vpu_setup_vclk(dev, &timing, is_cvbs);
93
94 video_set_flush_dcache(dev, 1);
95
96 return 0;
97}
98
99static const struct udevice_id meson_vpu_ids[] = {
100 { .compatible = "amlogic,meson-gxbb-vpu", .data = VPU_COMPATIBLE_GXBB },
101 { .compatible = "amlogic,meson-gxl-vpu", .data = VPU_COMPATIBLE_GXL },
102 { .compatible = "amlogic,meson-gxm-vpu", .data = VPU_COMPATIBLE_GXM },
Neil Armstrongbb18f7e2019-08-30 14:09:25 +0200103 { .compatible = "amlogic,meson-g12a-vpu", .data = VPU_COMPATIBLE_G12A },
Neil Armstrongadd986c2018-07-24 17:45:28 +0200104 { }
105};
106
107static int meson_vpu_probe(struct udevice *dev)
108{
109 struct meson_vpu_priv *priv = dev_get_priv(dev);
Neil Armstrongadd986c2018-07-24 17:45:28 +0200110 struct udevice *disp;
111 int ret;
112
113 /* Before relocation we don't need to do anything */
114 if (!(gd->flags & GD_FLG_RELOC))
115 return 0;
116
117 priv->dev = dev;
118
119 priv->io_base = dev_remap_addr_index(dev, 0);
120 if (!priv->io_base)
121 return -EINVAL;
122
123 priv->hhi_base = dev_remap_addr_index(dev, 1);
124 if (!priv->hhi_base)
125 return -EINVAL;
126
127 priv->dmc_base = dev_remap_addr_index(dev, 2);
128 if (!priv->dmc_base)
129 return -EINVAL;
130
Neil Armstrongadd986c2018-07-24 17:45:28 +0200131 meson_vpu_init(dev);
132
133 /* probe the display */
134 ret = uclass_get_device(UCLASS_DISPLAY, 0, &disp);
135
136 return meson_vpu_setup_mode(dev, ret ? NULL : disp);
137}
138
139static int meson_vpu_bind(struct udevice *dev)
140{
Simon Glassb75b15b2020-12-03 16:55:23 -0700141 struct video_uc_plat *plat = dev_get_uclass_plat(dev);
Neil Armstrongadd986c2018-07-24 17:45:28 +0200142
143 plat->size = VPU_MAX_WIDTH * VPU_MAX_HEIGHT *
144 (1 << VPU_MAX_LOG2_BPP) / 8;
145
146 return 0;
147}
148
149#if defined(CONFIG_VIDEO_DT_SIMPLEFB)
150static void meson_vpu_setup_simplefb(void *fdt)
151{
152 const char *pipeline = NULL;
153 u64 mem_start, mem_size;
154 int offset, ret;
155
156 if (meson_fb.is_cvbs)
157 pipeline = "vpu-cvbs";
158 else
159 pipeline = "vpu-hdmi";
160
161 offset = meson_simplefb_fdt_match(fdt, pipeline);
162 if (offset < 0) {
163 eprintf("Cannot setup simplefb: node not found\n");
164
165 /* If simplefb is missing, add it as reserved memory */
166 meson_board_add_reserved_memory(fdt, meson_fb.base,
167 meson_fb.fb_size);
168
169 return;
170 }
171
172 /*
173 * SimpleFB will try to iomap the framebuffer, so we can't use
174 * fdt_add_mem_rsv on the memory area. Instead, the FB is stored
175 * at the end of the RAM and we strip this portion from the kernel
176 * allowed region
177 */
178 mem_start = gd->bd->bi_dram[0].start;
179 mem_size = gd->bd->bi_dram[0].size - meson_fb.fb_size;
180 ret = fdt_fixup_memory_banks(fdt, &mem_start, &mem_size, 1);
181 if (ret) {
182 eprintf("Cannot setup simplefb: Error reserving memory\n");
183 return;
184 }
185
186 ret = fdt_setup_simplefb_node(fdt, offset, meson_fb.base,
187 meson_fb.xsize, meson_fb.ysize,
188 meson_fb.xsize * 4, "x8r8g8b8");
189 if (ret)
190 eprintf("Cannot setup simplefb: Error setting properties\n");
191}
192#endif
193
194void meson_vpu_rsv_fb(void *fdt)
195{
196 if (!meson_fb.base || !meson_fb.xsize || !meson_fb.ysize)
197 return;
198
199#if defined(CONFIG_EFI_LOADER)
Michael Walle282d3862020-05-17 12:29:19 +0200200 efi_add_memory_map(meson_fb.base, meson_fb.fb_size,
201 EFI_RESERVED_MEMORY_TYPE);
Neil Armstrongadd986c2018-07-24 17:45:28 +0200202#endif
203#if defined(CONFIG_VIDEO_DT_SIMPLEFB)
204 meson_vpu_setup_simplefb(fdt);
205#endif
206}
207
208U_BOOT_DRIVER(meson_vpu) = {
209 .name = "meson_vpu",
210 .id = UCLASS_VIDEO,
211 .of_match = meson_vpu_ids,
212 .probe = meson_vpu_probe,
213 .bind = meson_vpu_bind,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700214 .priv_auto = sizeof(struct meson_vpu_priv),
Simon Glass12810652021-01-24 14:32:42 -0700215 .flags = DM_FLAG_PRE_RELOC | DM_FLAG_LEAVE_PD_ON,
Neil Armstrongadd986c2018-07-24 17:45:28 +0200216};