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Tom Rinidec7ea02024-05-20 13:35:03 -06001# SPDX-License-Identifier: GPL-2.0-or-later
2#
3# (C) Copyright 2022 - Analog Devices, Inc.
4#
5# Written and/or maintained by Timesys Corporation
6#
7# Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
8# Contact: Greg Malysa <greg.malysa@timesys.com>
9#
10
11config COMMON_CLK_ADI_SHARED
12 bool "Enable shared ADI clock framework code"
13 help
14 Required for shared code between SoC clock drivers. Automatically
15 selected by an appropriate SoC-specific clock driver version.
16
17config COMMON_CLK_ADI_SC598
18 bool "Clock driver for ADI SC598 SoCs"
19 select DM
20 select CLK
21 select CLK_CCF
22 select OF_CONTROL
23 select CMD_CLK
24 select SPL_DM if SPL
25 select SPL_CLK if SPL
26 select SPL_CLK_CCF if SPL
27 select SPL_OF_CONTROL if SPL
28 select COMMON_CLK_ADI_SHARED
29 depends on SC59X_64
30 help
31 This driver supports the system clocks on Analog Devices SC598-series
32 SoCs. It includes CGU and CDU clocks and supports gating unused clocks.
33 Modifying PLL configuration is not supported; that must be done prior
34 to booting the kernel. Clock dividers after the PLLs may be configured.
35
36config COMMON_CLK_ADI_SC594
37 bool "Clock driver for ADI SC594 SoCs"
38 select DM
39 select CLK
40 select CLK_CCF
41 select OF_CONTROL
42 select CMD_CLK
43 select SPL_DM if SPL
44 select SPL_CLK if SPL
45 select SPL_CLK_CCF if SPL
46 select SPL_OF_CONTROL if SPL
47 select COMMON_CLK_ADI_SHARED
48 depends on SC59X
49 help
50 This driver supports the system clocks on Analog Devices SC594-series
51 SoCs. It includes CGU and CDU clocks and supports gating unused clocks.
52 Modifying PLL configuration is not supported; that must be done prior
53 to booting the kernel. Clock dividers after the PLLs may be configured.
54
55config COMMON_CLK_ADI_SC58X
56 bool "Clock driver for ADI SC58X SoCs"
57 select DM
58 select CLK
59 select CLK_CCF
60 select OF_CONTROL
61 select CMD_CLK
62 select COMMON_CLK_ADI_SHARED
63 depends on SC58X
64 help
65 This driver supports the system clocks on Analog Devices SC58x-series
66 SoCs. It includes CGU and CDU clocks and supports gating unused clocks.
67 Modifying PLL configuration is not supported; that must be done prior
68 to booting the kernel. Clock dividers after the PLLs may be configured.
69
70config COMMON_CLK_ADI_SC57X
71 bool "Clock driver for ADI SC57X SoCs"
72 select DM
73 select CLK
74 select CLK_CCF
75 select OF_CONTROL
76 select CMD_CLK
77 select COMMON_CLK_ADI_SHARED
78 depends on SC57X
79 help
80 This driver supports the system clocks on Analog Devices SC57x-series
81 SoCs. It includes CGU and CDU clocks and supports gating unused clocks.
82 Modifying PLL configuration is not supported; that must be done prior
83 to booting the kernel. Clock dividers after the PLLs may be configured.