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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenk0aeb8532004-10-10 21:21:55 +00002/*
chenhui zhao701a8e42011-09-15 14:52:34 +08003 * Copyright 2004, 2011 Freescale Semiconductor.
wdenk0aeb8532004-10-10 21:21:55 +00004 */
5
6
Tom Rinidec7ea02024-05-20 13:35:03 -06007#include <config.h>
Tom Rini8c70baa2021-12-14 13:36:40 -05008#include <clock_legacy.h>
Tom Rinidec7ea02024-05-20 13:35:03 -06009#include <linux/types.h>
wdenk0aeb8532004-10-10 21:21:55 +000010
11/*
12 * CADMUS Board System Registers
13 */
Tom Rini364d0022023-01-10 11:19:45 -050014#ifndef CFG_SYS_CADMUS_BASE_REG
15#define CFG_SYS_CADMUS_BASE_REG (CADMUS_BASE_ADDR + 0x4000)
wdenk0aeb8532004-10-10 21:21:55 +000016#endif
17
18typedef struct cadmus_reg {
19 u_char cm_ver; /* Board version */
20 u_char cm_csr; /* General control/status */
21 u_char cm_rst; /* Reset control */
22 u_char cm_hsclk; /* High speed clock */
23 u_char cm_hsxclk; /* High speed clock extended */
24 u_char cm_led; /* LED data */
25 u_char cm_pci; /* PCI control/status */
26 u_char cm_dma; /* DMA control */
27 u_char cm_reserved[248]; /* Total 256 bytes */
28} cadmus_reg_t;
29
30
31unsigned int
32get_board_version(void)
33{
Tom Rini364d0022023-01-10 11:19:45 -050034 volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CFG_SYS_CADMUS_BASE_REG;
wdenk0aeb8532004-10-10 21:21:55 +000035
36 return cadmus->cm_ver;
37}
38
39
40unsigned long
Tom Riniaea2a992021-12-14 13:36:39 -050041get_board_sys_clk(void)
wdenk0aeb8532004-10-10 21:21:55 +000042{
Tom Rini364d0022023-01-10 11:19:45 -050043 volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CFG_SYS_CADMUS_BASE_REG;
wdenk0aeb8532004-10-10 21:21:55 +000044
45 uint pci1_speed = (cadmus->cm_pci >> 2) & 0x3; /* PSPEED in [4:5] */
46
47 if (pci1_speed == 0) {
chenhui zhao701a8e42011-09-15 14:52:34 +080048 return 33333333;
wdenk0aeb8532004-10-10 21:21:55 +000049 } else if (pci1_speed == 1) {
chenhui zhao701a8e42011-09-15 14:52:34 +080050 return 66666666;
wdenk0aeb8532004-10-10 21:21:55 +000051 } else {
52 /* Really, unknown. Be safe? */
chenhui zhao701a8e42011-09-15 14:52:34 +080053 return 33333333;
wdenk0aeb8532004-10-10 21:21:55 +000054 }
55}
56
57
58unsigned int
59get_pci_slot(void)
60{
Tom Rini364d0022023-01-10 11:19:45 -050061 volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CFG_SYS_CADMUS_BASE_REG;
wdenk0aeb8532004-10-10 21:21:55 +000062
63 /*
64 * PCI slot in USER bits CSR[6:7] by convention.
65 */
66 return ((cadmus->cm_csr >> 6) & 0x3) + 1;
67}
68
69
70unsigned int
71get_pci_dual(void)
72{
Tom Rini364d0022023-01-10 11:19:45 -050073 volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CFG_SYS_CADMUS_BASE_REG;
wdenk0aeb8532004-10-10 21:21:55 +000074
75 /*
76 * PCI DUAL in CM_PCI[3]
77 */
78 return cadmus->cm_pci & 0x10;
79}