Simon Glass | c914f19 | 2019-12-08 17:40:13 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright 2019 Google LLC |
| 4 | */ |
| 5 | |
Simon Glass | 733c73a | 2021-01-24 10:06:04 -0700 | [diff] [blame] | 6 | #define LOG_CATEGORY LOGC_BOOT |
| 7 | |
Simon Glass | c914f19 | 2019-12-08 17:40:13 -0700 | [diff] [blame] | 8 | #include <binman_sym.h> |
Simon Glass | 1ea9789 | 2020-05-10 11:40:00 -0600 | [diff] [blame] | 9 | #include <bootstage.h> |
Simon Glass | c914f19 | 2019-12-08 17:40:13 -0700 | [diff] [blame] | 10 | #include <dm.h> |
Simon Glass | 2dc9c34 | 2020-05-10 11:40:01 -0600 | [diff] [blame] | 11 | #include <image.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 12 | #include <log.h> |
Simon Glass | 9bc1564 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 13 | #include <malloc.h> |
Simon Glass | c914f19 | 2019-12-08 17:40:13 -0700 | [diff] [blame] | 14 | #include <spi.h> |
| 15 | #include <spl.h> |
| 16 | #include <spi_flash.h> |
| 17 | #include <asm/fast_spi.h> |
| 18 | #include <asm/spl.h> |
| 19 | #include <asm/arch/cpu.h> |
| 20 | #include <asm/arch/iomap.h> |
| 21 | #include <dm/device-internal.h> |
| 22 | #include <dm/uclass-internal.h> |
| 23 | |
| 24 | /* This reads the next phase from mapped SPI flash */ |
| 25 | static int rom_load_image(struct spl_image_info *spl_image, |
| 26 | struct spl_boot_device *bootdev) |
| 27 | { |
| 28 | ulong spl_pos = spl_get_image_pos(); |
| 29 | ulong spl_size = spl_get_image_size(); |
| 30 | struct udevice *dev; |
| 31 | ulong map_base; |
| 32 | size_t map_size; |
| 33 | uint offset; |
| 34 | int ret; |
| 35 | |
| 36 | spl_image->size = CONFIG_SYS_MONITOR_LEN; /* We don't know SPL size */ |
Simon Glass | 733c73a | 2021-01-24 10:06:04 -0700 | [diff] [blame] | 37 | spl_image->entry_point = spl_get_image_text_base(); |
Simon Glass | c914f19 | 2019-12-08 17:40:13 -0700 | [diff] [blame] | 38 | spl_image->load_addr = spl_image->entry_point; |
| 39 | spl_image->os = IH_OS_U_BOOT; |
| 40 | spl_image->name = "U-Boot"; |
Simon Glass | 733c73a | 2021-01-24 10:06:04 -0700 | [diff] [blame] | 41 | log_debug("Reading from mapped SPI %lx, size %lx\n", spl_pos, spl_size); |
Simon Glass | c914f19 | 2019-12-08 17:40:13 -0700 | [diff] [blame] | 42 | |
| 43 | if (CONFIG_IS_ENABLED(SPI_FLASH_SUPPORT)) { |
| 44 | ret = uclass_find_first_device(UCLASS_SPI_FLASH, &dev); |
| 45 | if (ret) |
| 46 | return log_msg_ret("spi_flash", ret); |
| 47 | if (!dev) |
| 48 | return log_msg_ret("spi_flash dev", -ENODEV); |
| 49 | ret = dm_spi_get_mmap(dev, &map_base, &map_size, &offset); |
| 50 | if (ret) |
| 51 | return log_msg_ret("mmap", ret); |
| 52 | } else { |
| 53 | ret = fast_spi_get_bios_mmap(PCH_DEV_SPI, &map_base, &map_size, |
| 54 | &offset); |
| 55 | if (ret) |
| 56 | return ret; |
| 57 | } |
| 58 | spl_pos += map_base & ~0xff000000; |
Simon Glass | 733c73a | 2021-01-24 10:06:04 -0700 | [diff] [blame] | 59 | log_debug(", base %lx, pos %lx, load %lx\n", map_base, spl_pos, |
| 60 | spl_image->load_addr); |
Simon Glass | c914f19 | 2019-12-08 17:40:13 -0700 | [diff] [blame] | 61 | bootstage_start(BOOTSTAGE_ID_ACCUM_MMAP_SPI, "mmap_spi"); |
| 62 | memcpy((void *)spl_image->load_addr, (void *)spl_pos, spl_size); |
| 63 | cpu_flush_l1d_to_l2(); |
| 64 | bootstage_accum(BOOTSTAGE_ID_ACCUM_MMAP_SPI); |
| 65 | |
| 66 | return 0; |
| 67 | } |
| 68 | SPL_LOAD_IMAGE_METHOD("Mapped SPI", 2, BOOT_DEVICE_SPI_MMAP, rom_load_image); |
| 69 | |
| 70 | #if CONFIG_IS_ENABLED(SPI_FLASH_SUPPORT) |
| 71 | |
| 72 | static int apl_flash_std_read(struct udevice *dev, u32 offset, size_t len, |
| 73 | void *buf) |
| 74 | { |
| 75 | struct spi_flash *flash = dev_get_uclass_priv(dev); |
| 76 | struct mtd_info *mtd = &flash->mtd; |
| 77 | size_t retlen; |
| 78 | |
| 79 | return log_ret(mtd->_read(mtd, offset, len, &retlen, buf)); |
| 80 | } |
| 81 | |
| 82 | static int apl_flash_probe(struct udevice *dev) |
| 83 | { |
| 84 | return spi_flash_std_probe(dev); |
| 85 | } |
| 86 | |
Simon Glass | c914f19 | 2019-12-08 17:40:13 -0700 | [diff] [blame] | 87 | static const struct dm_spi_flash_ops apl_flash_ops = { |
| 88 | .read = apl_flash_std_read, |
| 89 | }; |
| 90 | |
| 91 | static const struct udevice_id apl_flash_ids[] = { |
| 92 | { .compatible = "jedec,spi-nor" }, |
| 93 | { } |
| 94 | }; |
| 95 | |
| 96 | U_BOOT_DRIVER(winbond_w25q128fw) = { |
| 97 | .name = "winbond_w25q128fw", |
| 98 | .id = UCLASS_SPI_FLASH, |
| 99 | .of_match = apl_flash_ids, |
Simon Glass | c914f19 | 2019-12-08 17:40:13 -0700 | [diff] [blame] | 100 | .probe = apl_flash_probe, |
Simon Glass | e2a4ec8 | 2020-12-19 10:40:02 -0700 | [diff] [blame] | 101 | .priv_auto = sizeof(struct spi_nor), |
Simon Glass | c914f19 | 2019-12-08 17:40:13 -0700 | [diff] [blame] | 102 | .ops = &apl_flash_ops, |
| 103 | }; |
| 104 | |
| 105 | /* This uses a SPI flash device to read the next phase */ |
| 106 | static int spl_fast_spi_load_image(struct spl_image_info *spl_image, |
| 107 | struct spl_boot_device *bootdev) |
| 108 | { |
| 109 | ulong spl_pos = spl_get_image_pos(); |
| 110 | ulong spl_size = spl_get_image_size(); |
| 111 | struct udevice *dev; |
| 112 | int ret; |
| 113 | |
| 114 | ret = uclass_first_device_err(UCLASS_SPI_FLASH, &dev); |
| 115 | if (ret) |
| 116 | return ret; |
| 117 | |
| 118 | spl_image->size = CONFIG_SYS_MONITOR_LEN; /* We don't know SPL size */ |
| 119 | spl_image->entry_point = spl_phase() == PHASE_TPL ? |
Simon Glass | 72cc538 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 120 | CONFIG_SPL_TEXT_BASE : CONFIG_TEXT_BASE; |
Simon Glass | c914f19 | 2019-12-08 17:40:13 -0700 | [diff] [blame] | 121 | spl_image->load_addr = spl_image->entry_point; |
| 122 | spl_image->os = IH_OS_U_BOOT; |
| 123 | spl_image->name = "U-Boot"; |
| 124 | spl_pos &= ~0xff000000; |
Simon Glass | 733c73a | 2021-01-24 10:06:04 -0700 | [diff] [blame] | 125 | log_debug("Reading from flash %lx, size %lx\n", spl_pos, spl_size); |
Simon Glass | c914f19 | 2019-12-08 17:40:13 -0700 | [diff] [blame] | 126 | ret = spi_flash_read_dm(dev, spl_pos, spl_size, |
| 127 | (void *)spl_image->load_addr); |
| 128 | cpu_flush_l1d_to_l2(); |
| 129 | if (ret) |
| 130 | return ret; |
| 131 | |
| 132 | return 0; |
| 133 | } |
| 134 | SPL_LOAD_IMAGE_METHOD("Fast SPI", 1, BOOT_DEVICE_FAST_SPI, |
| 135 | spl_fast_spi_load_image); |
| 136 | |
| 137 | void board_boot_order(u32 *spl_boot_list) |
| 138 | { |
| 139 | bool use_spi_flash = IS_ENABLED(CONFIG_APL_BOOT_FROM_FAST_SPI_FLASH); |
| 140 | |
| 141 | if (use_spi_flash) { |
| 142 | spl_boot_list[0] = BOOT_DEVICE_FAST_SPI; |
| 143 | spl_boot_list[1] = BOOT_DEVICE_SPI_MMAP; |
| 144 | } else { |
| 145 | spl_boot_list[0] = BOOT_DEVICE_SPI_MMAP; |
| 146 | spl_boot_list[1] = BOOT_DEVICE_FAST_SPI; |
| 147 | } |
| 148 | } |
| 149 | |
| 150 | #else |
| 151 | |
| 152 | void board_boot_order(u32 *spl_boot_list) |
| 153 | { |
| 154 | spl_boot_list[0] = BOOT_DEVICE_SPI_MMAP; |
| 155 | } |
| 156 | #endif |