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git01.mediatek.com / filogic / uboot / 324cb4d73d2883138305686b6f013e9e84de580d / . / arch / arm / mach-socfpga / secure_reg_helper.c
blob: 802a966ce87a1e0f4a6d7c2b723fca04b380506e [file] [log] [blame]
Siew Chin Limc984e1f2020-12-24 18:21:02 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2020 Intel Corporation <www.intel.com>
4 *
5 */
6
Siew Chin Limc984e1f2020-12-24 18:21:02 +0800[diff] [blame]7#include <hang.h>
8#include <asm/io.h>
9#include <asm/system.h>
10#include <asm/arch/misc.h>
11#include <asm/arch/secure_reg_helper.h>
12#include <asm/arch/smc_api.h>
13#include <asm/arch/system_manager.h>
14#include <linux/errno.h>
15#include <linux/intel-smc.h>
16
17int socfpga_secure_convert_reg_id_to_addr(u32 id, phys_addr_t *reg_addr)
18{
19 switch (id) {
20 case SOCFPGA_SECURE_REG_SYSMGR_SOC64_SDMMC:
21 *reg_addr = socfpga_get_sysmgr_addr() + SYSMGR_SOC64_SDMMC;
22 break;
23 case SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC0:
24 *reg_addr = socfpga_get_sysmgr_addr() + SYSMGR_SOC64_EMAC0;
25 break;
26 case SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC1:
27 *reg_addr = socfpga_get_sysmgr_addr() + SYSMGR_SOC64_EMAC1;
28 break;
29 case SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC2:
30 *reg_addr = socfpga_get_sysmgr_addr() + SYSMGR_SOC64_EMAC2;
31 break;
32 default:
33 return -EADDRNOTAVAIL;
34 }
35 return 0;
36}
37
38int socfpga_secure_reg_read32(u32 id, u32 *val)
39{
40 int ret;
41 u64 ret_arg;
42 u64 args[1];
43
44 phys_addr_t reg_addr;
45 ret = socfpga_secure_convert_reg_id_to_addr(id, &reg_addr);
46 if (ret)
47 return ret;
48
49 args[0] = (u64)reg_addr;
50 ret = invoke_smc(INTEL_SIP_SMC_REG_READ, args, 1, &ret_arg, 1);
51 if (ret)
52 return ret;
53
54 *val = (u32)ret_arg;
55
56 return 0;
57}
58
59int socfpga_secure_reg_write32(u32 id, u32 val)
60{
61 int ret;
62 u64 args[2];
63
64 phys_addr_t reg_addr;
65 ret = socfpga_secure_convert_reg_id_to_addr(id, &reg_addr);
66 if (ret)
67 return ret;
68
69 args[0] = (u64)reg_addr;
70 args[1] = val;
71 return invoke_smc(INTEL_SIP_SMC_REG_WRITE, args, 2, NULL, 0);
72}
73
74int socfpga_secure_reg_update32(u32 id, u32 mask, u32 val)
75{
76 int ret;
77 u64 args[3];
78
79 phys_addr_t reg_addr;
80 ret = socfpga_secure_convert_reg_id_to_addr(id, &reg_addr);
81 if (ret)
82 return ret;
83
84 args[0] = (u64)reg_addr;
85 args[1] = mask;
86 args[2] = val;
87 return invoke_smc(INTEL_SIP_SMC_REG_UPDATE, args, 3, NULL, 0);
88}