Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Robert Baldyga | 1aee11c | 2014-09-19 12:17:55 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2014 Samsung Electronics |
| 4 | * Minkyu Kang <mk7.kang@samsung.com> |
| 5 | * Robert Baldyga <r.baldyga@samsung.com> |
| 6 | * |
| 7 | * based on arch/arm/cpu/armv7/omap3/cache.S |
Robert Baldyga | 1aee11c | 2014-09-19 12:17:55 +0200 | [diff] [blame] | 8 | */ |
| 9 | |
Simon Glass | 1d91ba7 | 2019-11-14 12:57:37 -0700 | [diff] [blame] | 10 | #include <cpu_func.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 11 | #include <asm/cache.h> |
Robert Baldyga | 1aee11c | 2014-09-19 12:17:55 +0200 | [diff] [blame] | 12 | |
Trevor Woerner | 43ec7e0 | 2019-05-03 09:41:00 -0400 | [diff] [blame] | 13 | #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) |
Robert Baldyga | 1aee11c | 2014-09-19 12:17:55 +0200 | [diff] [blame] | 14 | void enable_caches(void) |
| 15 | { |
| 16 | dcache_enable(); |
| 17 | } |
| 18 | |
| 19 | void disable_caches(void) |
| 20 | { |
| 21 | dcache_disable(); |
| 22 | } |
| 23 | #endif |
| 24 | |
| 25 | #ifndef CONFIG_SYS_L2CACHE_OFF |
| 26 | void v7_outer_cache_enable(void) |
| 27 | { |
| 28 | __asm( |
| 29 | "push {r0, r1, r2, lr}\n\t" |
| 30 | "mrc 15, 0, r3, cr1, cr0, 1\n\t" |
| 31 | "orr r3, r3, #2\n\t" |
| 32 | "mcr 15, 0, r3, cr1, cr0, 1\n\t" |
| 33 | "pop {r1, r2, r3, pc}" |
| 34 | ); |
| 35 | } |
| 36 | |
| 37 | void v7_outer_cache_disable(void) |
| 38 | { |
| 39 | __asm( |
| 40 | "push {r0, r1, r2, lr}\n\t" |
| 41 | "mrc 15, 0, r3, cr1, cr0, 1\n\t" |
| 42 | "bic r3, r3, #2\n\t" |
| 43 | "mcr 15, 0, r3, cr1, cr0, 1\n\t" |
| 44 | "pop {r1, r2, r3, pc}" |
| 45 | ); |
| 46 | } |
| 47 | #endif |