blob: 7c49462c8eb4ff1cd110f4dd5fe73a8a150c31ed [file] [log] [blame]
Simon Glassa83ab162020-05-10 14:16:56 -06001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * ARM-specific information for the 'bd' command
4 *
5 * (C) Copyright 2003
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 */
8
Tom Rinidec7ea02024-05-20 13:35:03 -06009#include <config.h>
Simon Glassa83ab162020-05-10 14:16:56 -060010#include <init.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060011#include <asm/global_data.h>
Ovidiu Panaitfefffcf2022-09-13 21:31:27 +030012#include <asm/mach-types.h>
Simon Glassa83ab162020-05-10 14:16:56 -060013
14DECLARE_GLOBAL_DATA_PTR;
15
Ovidiu Panaitfefffcf2022-09-13 21:31:27 +030016int arch_setup_bdinfo(void)
17{
18#ifdef CONFIG_MACH_TYPE
19 struct bd_info *bd = gd->bd;
20
21 bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
22#endif
23
24 return 0;
25}
26
Simon Glassa83ab162020-05-10 14:16:56 -060027void arch_print_bdinfo(void)
28{
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +090029 struct bd_info *bd = gd->bd;
Simon Glassa83ab162020-05-10 14:16:56 -060030
Bin Meng1ae7a0c2021-01-31 20:36:05 +080031 bdinfo_print_num_l("arch_number", bd->bi_arch_number);
Tom Rini6a5dccc2022-11-16 13:10:41 -050032#ifdef CFG_SYS_MEM_RESERVE_SECURE
Simon Glassa83ab162020-05-10 14:16:56 -060033 if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) {
Bin Mengf5dc7f62021-01-31 20:36:06 +080034 bdinfo_print_num_ll("Secure ram",
35 gd->arch.secure_ram &
36 MEM_RESERVE_SECURE_ADDR_MASK);
Simon Glassa83ab162020-05-10 14:16:56 -060037 }
38#endif
39#ifdef CONFIG_RESV_RAM
40 if (gd->arch.resv_ram)
Bin Mengf5dc7f62021-01-31 20:36:06 +080041 bdinfo_print_num_ll("Reserved ram", gd->arch.resv_ram);
Simon Glassa83ab162020-05-10 14:16:56 -060042#endif
43#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
Bin Meng1ae7a0c2021-01-31 20:36:05 +080044 bdinfo_print_num_l("TLB addr", gd->arch.tlb_addr);
Simon Glassa83ab162020-05-10 14:16:56 -060045#endif
Bin Meng1ae7a0c2021-01-31 20:36:05 +080046 bdinfo_print_num_l("irq_sp", gd->irq_sp); /* irq stack pointer */
47 bdinfo_print_num_l("sp start ", gd->start_addr_sp);
Simon Glassa83ab162020-05-10 14:16:56 -060048 /*
49 * TODO: Currently only support for davinci SOC's is added.
50 * Remove this check once all the board implement this.
51 */
52#ifdef CONFIG_CLOCKS
53 printf("ARM frequency = %ld MHz\n", bd->bi_arm_freq);
54 printf("DSP frequency = %ld MHz\n", bd->bi_dsp_freq);
55 printf("DDR frequency = %ld MHz\n", bd->bi_ddr_freq);
56#endif
57#ifdef CONFIG_BOARD_TYPES
58 printf("Board Type = %ld\n", gd->board_type);
59#endif
Simon Glassadad2d02023-09-26 08:14:27 -060060#if CONFIG_IS_ENABLED(SYS_MALLOC_F)
Simon Glassa83ab162020-05-10 14:16:56 -060061 printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr,
62 CONFIG_VAL(SYS_MALLOC_F_LEN));
63#endif
64}