Simon Glass | a83ab16 | 2020-05-10 14:16:56 -0600 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * ARM-specific information for the 'bd' command |
| 4 | * |
| 5 | * (C) Copyright 2003 |
| 6 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 7 | */ |
| 8 | |
Tom Rini | dec7ea0 | 2024-05-20 13:35:03 -0600 | [diff] [blame] | 9 | #include <config.h> |
Simon Glass | a83ab16 | 2020-05-10 14:16:56 -0600 | [diff] [blame] | 10 | #include <init.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 11 | #include <asm/global_data.h> |
Ovidiu Panait | fefffcf | 2022-09-13 21:31:27 +0300 | [diff] [blame] | 12 | #include <asm/mach-types.h> |
Simon Glass | a83ab16 | 2020-05-10 14:16:56 -0600 | [diff] [blame] | 13 | |
| 14 | DECLARE_GLOBAL_DATA_PTR; |
| 15 | |
Ovidiu Panait | fefffcf | 2022-09-13 21:31:27 +0300 | [diff] [blame] | 16 | int arch_setup_bdinfo(void) |
| 17 | { |
| 18 | #ifdef CONFIG_MACH_TYPE |
| 19 | struct bd_info *bd = gd->bd; |
| 20 | |
| 21 | bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ |
| 22 | #endif |
| 23 | |
| 24 | return 0; |
| 25 | } |
| 26 | |
Simon Glass | a83ab16 | 2020-05-10 14:16:56 -0600 | [diff] [blame] | 27 | void arch_print_bdinfo(void) |
| 28 | { |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 29 | struct bd_info *bd = gd->bd; |
Simon Glass | a83ab16 | 2020-05-10 14:16:56 -0600 | [diff] [blame] | 30 | |
Bin Meng | 1ae7a0c | 2021-01-31 20:36:05 +0800 | [diff] [blame] | 31 | bdinfo_print_num_l("arch_number", bd->bi_arch_number); |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 32 | #ifdef CFG_SYS_MEM_RESERVE_SECURE |
Simon Glass | a83ab16 | 2020-05-10 14:16:56 -0600 | [diff] [blame] | 33 | if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) { |
Bin Meng | f5dc7f6 | 2021-01-31 20:36:06 +0800 | [diff] [blame] | 34 | bdinfo_print_num_ll("Secure ram", |
| 35 | gd->arch.secure_ram & |
| 36 | MEM_RESERVE_SECURE_ADDR_MASK); |
Simon Glass | a83ab16 | 2020-05-10 14:16:56 -0600 | [diff] [blame] | 37 | } |
| 38 | #endif |
| 39 | #ifdef CONFIG_RESV_RAM |
| 40 | if (gd->arch.resv_ram) |
Bin Meng | f5dc7f6 | 2021-01-31 20:36:06 +0800 | [diff] [blame] | 41 | bdinfo_print_num_ll("Reserved ram", gd->arch.resv_ram); |
Simon Glass | a83ab16 | 2020-05-10 14:16:56 -0600 | [diff] [blame] | 42 | #endif |
| 43 | #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) |
Bin Meng | 1ae7a0c | 2021-01-31 20:36:05 +0800 | [diff] [blame] | 44 | bdinfo_print_num_l("TLB addr", gd->arch.tlb_addr); |
Simon Glass | a83ab16 | 2020-05-10 14:16:56 -0600 | [diff] [blame] | 45 | #endif |
Bin Meng | 1ae7a0c | 2021-01-31 20:36:05 +0800 | [diff] [blame] | 46 | bdinfo_print_num_l("irq_sp", gd->irq_sp); /* irq stack pointer */ |
| 47 | bdinfo_print_num_l("sp start ", gd->start_addr_sp); |
Simon Glass | a83ab16 | 2020-05-10 14:16:56 -0600 | [diff] [blame] | 48 | /* |
| 49 | * TODO: Currently only support for davinci SOC's is added. |
| 50 | * Remove this check once all the board implement this. |
| 51 | */ |
| 52 | #ifdef CONFIG_CLOCKS |
| 53 | printf("ARM frequency = %ld MHz\n", bd->bi_arm_freq); |
| 54 | printf("DSP frequency = %ld MHz\n", bd->bi_dsp_freq); |
| 55 | printf("DDR frequency = %ld MHz\n", bd->bi_ddr_freq); |
| 56 | #endif |
| 57 | #ifdef CONFIG_BOARD_TYPES |
| 58 | printf("Board Type = %ld\n", gd->board_type); |
| 59 | #endif |
Simon Glass | adad2d0 | 2023-09-26 08:14:27 -0600 | [diff] [blame] | 60 | #if CONFIG_IS_ENABLED(SYS_MALLOC_F) |
Simon Glass | a83ab16 | 2020-05-10 14:16:56 -0600 | [diff] [blame] | 61 | printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr, |
| 62 | CONFIG_VAL(SYS_MALLOC_F_LEN)); |
| 63 | #endif |
| 64 | } |