| Robert Marko | 1b5ea2a | 2022-05-20 13:46:32 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_CPU_INIT=y |
| 3 | CONFIG_ARCH_MVEBU=y |
| 4 | CONFIG_SYS_TEXT_BASE=0x00000000 |
| 5 | CONFIG_TARGET_MVEBU_ARMADA_37XX=y |
| 6 | CONFIG_MVEBU_EFUSE=y |
| 7 | CONFIG_ENV_SIZE=0x10000 |
| 8 | CONFIG_ENV_OFFSET=0x180000 |
| 9 | CONFIG_ENV_SECT_SIZE=0x10000 |
| 10 | CONFIG_DM_GPIO=y |
| 11 | CONFIG_DEFAULT_DEVICE_TREE="armada-3720-eDPU" |
| Tom Rini | ce53ec8 | 2022-08-23 15:24:14 -0400 | [diff] [blame] | 12 | CONFIG_SYS_PROMPT="eDPU>> " |
| Robert Marko | 1b5ea2a | 2022-05-20 13:46:32 +0200 | [diff] [blame] | 13 | CONFIG_DEBUG_UART_BASE=0xd0012000 |
| 14 | CONFIG_SYS_LOAD_ADDR=0x6000000 |
| 15 | CONFIG_DEBUG_UART=y |
| 16 | CONFIG_DISTRO_DEFAULTS=y |
| 17 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 18 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 |
| 19 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| 20 | CONFIG_FIT=y |
| 21 | CONFIG_FIT_VERBOSE=y |
| 22 | CONFIG_USE_PREBOOT=y |
| 23 | # CONFIG_DISPLAY_CPUINFO is not set |
| 24 | # CONFIG_DISPLAY_BOARDINFO is not set |
| 25 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| 26 | CONFIG_ARCH_EARLY_INIT_R=y |
| 27 | CONFIG_BOARD_EARLY_INIT_F=y |
| Robert Marko | 1b5ea2a | 2022-05-20 13:46:32 +0200 | [diff] [blame] | 28 | CONFIG_SYS_MAXARGS=32 |
| 29 | CONFIG_SYS_PBSIZE=1048 |
| 30 | # CONFIG_CMD_ELF is not set |
| 31 | # CONFIG_CMD_IMI is not set |
| 32 | # CONFIG_CMD_XIMG is not set |
| 33 | # CONFIG_CMD_FLASH is not set |
| 34 | CONFIG_CMD_FUSE=y |
| 35 | CONFIG_CMD_GPIO=y |
| 36 | CONFIG_CMD_I2C=y |
| 37 | CONFIG_CMD_MMC=y |
| 38 | CONFIG_CMD_MTD=y |
| Robert Marko | 1b5ea2a | 2022-05-20 13:46:32 +0200 | [diff] [blame] | 39 | CONFIG_CMD_SPI=y |
| 40 | CONFIG_CMD_USB=y |
| 41 | # CONFIG_CMD_SETEXPR is not set |
| 42 | CONFIG_CMD_TFTPPUT=y |
| 43 | CONFIG_CMD_CACHE=y |
| 44 | CONFIG_CMD_TIME=y |
| 45 | CONFIG_CMD_MVEBU_BUBT=y |
| 46 | CONFIG_CMD_EXT4_WRITE=y |
| 47 | CONFIG_MAC_PARTITION=y |
| 48 | CONFIG_ENV_OVERWRITE=y |
| 49 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
| 50 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 51 | CONFIG_ARP_TIMEOUT=200 |
| 52 | CONFIG_NET_RETRY_COUNT=50 |
| 53 | CONFIG_NET_RANDOM_ETHADDR=y |
| 54 | CONFIG_LBA48=y |
| 55 | CONFIG_SYS_64BIT_LBA=y |
| 56 | CONFIG_CLK=y |
| 57 | CONFIG_CLK_MVEBU=y |
| 58 | CONFIG_DM_I2C=y |
| 59 | CONFIG_DM_I2C_GPIO=y |
| 60 | CONFIG_SYS_I2C_MV=y |
| 61 | CONFIG_MISC=y |
| 62 | CONFIG_MMC_HS200_SUPPORT=y |
| 63 | CONFIG_MMC_SDHCI=y |
| 64 | CONFIG_MMC_SDHCI_SDMA=y |
| 65 | CONFIG_MMC_SDHCI_XENON=y |
| 66 | CONFIG_MTD=y |
| 67 | CONFIG_DM_MTD=y |
| 68 | CONFIG_SPI_FLASH_SFDP_SUPPORT=y |
| 69 | CONFIG_SPI_FLASH_MACRONIX=y |
| 70 | CONFIG_SPI_FLASH_SPANSION=y |
| 71 | CONFIG_SPI_FLASH_STMICRO=y |
| 72 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |
| 73 | CONFIG_SPI_FLASH_MTD=y |
| 74 | CONFIG_PHYLIB_10G=y |
| 75 | CONFIG_PHY_MARVELL=y |
| 76 | CONFIG_PHY_FIXED=y |
| 77 | CONFIG_PHY_GIGE=y |
| 78 | CONFIG_MVNETA=y |
| 79 | CONFIG_MVMDIO=y |
| 80 | CONFIG_PHY=y |
| 81 | CONFIG_MVEBU_COMPHY_SUPPORT=y |
| 82 | CONFIG_PINCTRL=y |
| 83 | CONFIG_PINCTRL_ARMADA_37XX=y |
| 84 | CONFIG_DM_REGULATOR_FIXED=y |
| 85 | CONFIG_DM_REGULATOR_GPIO=y |
| Robert Marko | 9c1b93d | 2022-06-03 12:53:04 +0200 | [diff] [blame] | 86 | # CONFIG_SCSI is not set |
| Robert Marko | 1b5ea2a | 2022-05-20 13:46:32 +0200 | [diff] [blame] | 87 | CONFIG_MVEBU_A3700_UART=y |
| 88 | CONFIG_MVEBU_A3700_SPI=y |
| 89 | CONFIG_SYSINFO=y |
| 90 | CONFIG_SYSINFO_SMBIOS=y |
| 91 | CONFIG_USB=y |
| 92 | CONFIG_USB_XHCI_HCD=y |
| 93 | CONFIG_USB_EHCI_HCD=y |
| 94 | CONFIG_USB_HOST_ETHER=y |
| 95 | CONFIG_USB_ETHER_ASIX=y |
| 96 | CONFIG_USB_ETHER_MCS7830=y |
| 97 | CONFIG_USB_ETHER_RTL8152=y |
| 98 | CONFIG_USB_ETHER_SMSC95XX=y |
| 99 | CONFIG_LZO=y |