| Felipe Balbi | ee2e85f | 2017-04-01 16:21:33 +0300 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2017 Intel Corporation |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | #ifndef _X86_ASM_SCU_IPC_H_ |
| 7 | #define _X86_ASM_SCU_IPC_H_ |
| 8 | |
| 9 | /* IPC defines the following message types */ |
| 10 | #define IPCMSG_WARM_RESET 0xf0 |
| 11 | #define IPCMSG_COLD_RESET 0xf1 |
| 12 | #define IPCMSG_SOFT_RESET 0xf2 |
| 13 | #define IPCMSG_COLD_BOOT 0xf3 |
| 14 | #define IPCMSG_GET_FW_REVISION 0xf4 |
| 15 | #define IPCMSG_WATCHDOG_TIMER 0xf8 /* Set Kernel Watchdog Threshold */ |
| 16 | |
| 17 | struct ipc_ifwi_version { |
| 18 | u16 minor; |
| 19 | u8 major; |
| 20 | u8 hardware_id; |
| 21 | u32 reserved[3]; |
| 22 | }; |
| 23 | |
| 24 | /* Issue commands to the SCU with or without data */ |
| 25 | int scu_ipc_simple_command(u32 cmd, u32 sub); |
| 26 | int scu_ipc_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out, int outlen); |
| 27 | |
| 28 | #endif /* _X86_ASM_SCU_IPC_H_ */ |