blob: 9765da5b2354af0e196e9f40f7b93015619c346d [file] [log] [blame]
Kumar Gala2683c532011-04-13 08:37:44 -05001/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19#include <common.h>
20#include <phy.h>
21#include <fm_eth.h>
22#include <asm/io.h>
23#include <asm/immap_85xx.h>
24#include <asm/fsl_serdes.h>
25
26u32 port_to_devdisr[] = {
27 [FM1_DTSEC1] = MPC85xx_DEVDISR_TSEC1,
28 [FM1_DTSEC2] = MPC85xx_DEVDISR_TSEC2,
29};
30
31static int is_device_disabled(enum fm_port port)
32{
33 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
34 u32 devdisr = in_be32(&gur->devdisr);
35
36 return port_to_devdisr[port] & devdisr;
37}
38
Kumar Gala5536d922011-09-14 12:01:35 -050039void fman_disable_port(enum fm_port port)
40{
41 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
Kumar Gala213c7b12011-10-14 03:17:56 -050042
43 /* don't allow disabling of DTSEC1 as its needed for MDIO */
44 if (port == FM1_DTSEC1)
45 return;
46
Kumar Gala5536d922011-09-14 12:01:35 -050047 setbits_be32(&gur->devdisr, port_to_devdisr[port]);
48}
49
Kumar Gala2683c532011-04-13 08:37:44 -050050phy_interface_t fman_port_enet_if(enum fm_port port)
51{
52 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
53 u32 pordevsr = in_be32(&gur->pordevsr);
54
55 if (is_device_disabled(port))
56 return PHY_INTERFACE_MODE_NONE;
57
58 /* DTSEC1 can be SGMII, RGMII or RMII */
59 if (port == FM1_DTSEC1) {
60 if (is_serdes_configured(SGMII_FM1_DTSEC1))
61 return PHY_INTERFACE_MODE_SGMII;
62 if (pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS) {
63 if (pordevsr & MPC85xx_PORDEVSR_TSEC1_PRTC)
64 return PHY_INTERFACE_MODE_RGMII;
65 else
66 return PHY_INTERFACE_MODE_RMII;
67 }
68 }
69
70 /* DTSEC2 only supports SGMII or RGMII */
71 if (port == FM1_DTSEC2) {
72 if (is_serdes_configured(SGMII_FM1_DTSEC2))
73 return PHY_INTERFACE_MODE_SGMII;
74 if (pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)
75 return PHY_INTERFACE_MODE_RGMII;
76 }
77
78 return PHY_INTERFACE_MODE_NONE;
79}