| Stefano Babic | d67cdcd | 2011-10-23 23:58:20 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> |
| 3 | * |
| 4 | * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. |
| 5 | * |
| 6 | * Copyright (C) 2011, Stefano Babic <sbabic@denx.de> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <config.h> |
| 25 | #include <asm-offsets.h> |
| 26 | #include <asm/arch/imx-regs.h> |
| 27 | #include <generated/asm-offsets.h> |
| 28 | |
| 29 | /* |
| 30 | * Configuration for the flea3 board. |
| 31 | * These defines are used by the included macros and must |
| 32 | * be defined first |
| 33 | */ |
| 34 | #define AIPS_MPR_CONFIG 0x77777777 |
| 35 | #define AIPS_OPACR_CONFIG 0x00000000 |
| 36 | |
| 37 | /* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */ |
| 38 | #define MAX_MPR_CONFIG 0x00302154 |
| 39 | |
| 40 | /* SGPCR - always park on last master */ |
| 41 | #define MAX_SGPCR_CONFIG 0x00000010 |
| 42 | |
| 43 | /* MGPCR - restore default values */ |
| 44 | #define MAX_MGPCR_CONFIG 0x00000000 |
| 45 | |
| 46 | /* |
| 47 | * M3IF Control Register (M3IFCTL) |
| 48 | * MRRP[0] = L2CC0 not on priority list (0 << 0) = 0x00000000 |
| 49 | * MRRP[1] = L2CC1 not on priority list (0 << 0) = 0x00000000 |
| 50 | * MRRP[2] = MBX not on priority list (0 << 0) = 0x00000000 |
| 51 | * MRRP[3] = MAX1 not on priority list (0 << 0) = 0x00000000 |
| 52 | * MRRP[4] = SDMA not on priority list (0 << 0) = 0x00000000 |
| 53 | * MRRP[5] = MPEG4 not on priority list (0 << 0) = 0x00000000 |
| 54 | * MRRP[6] = IPU1 on priority list (1 << 6) = 0x00000040 |
| 55 | * MRRP[7] = IPU2 not on priority list (0 << 0) = 0x00000000 |
| 56 | * ------------ |
| 57 | * 0x00000040 |
| 58 | */ |
| 59 | #define M3IF_CONFIG 0x00000040 |
| 60 | |
| 61 | #define CCM_PDR0_CONFIG 0x00801000 |
| 62 | |
| 63 | /* |
| 64 | * includes MX35 utility macros |
| 65 | */ |
| 66 | #include <asm/arch/lowlevel_macro.S> |
| 67 | |
| 68 | .globl lowlevel_init |
| 69 | lowlevel_init: |
| 70 | |
| 71 | core_init |
| 72 | |
| 73 | init_aips |
| 74 | |
| 75 | init_max |
| 76 | |
| 77 | init_m3if |
| 78 | |
| 79 | mov pc, lr |