blob: 0dbf304487fc6c8793666722868771d36af583c6 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Dipen Dudhat00c42942011-01-20 16:29:35 +05302/*
3 * Copyright 2010-2011 Freescale Semiconductor, Inc.
4 * Author: Dipen Dudhat <dipen.dudhat@freescale.com>
Dipen Dudhat00c42942011-01-20 16:29:35 +05305 */
6
7#include <common.h>
York Sun37562f62013-10-22 12:39:02 -07008#include <fsl_ifc.h>
Dipen Dudhat00c42942011-01-20 16:29:35 +05309
Rajesh Bhagat76e1d472018-12-27 04:37:51 +000010#ifdef CONFIG_TFABOOT
Pankit Garg92d443b2018-11-05 18:01:33 +000011struct ifc_regs ifc_cfg_default_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
12 {
13 "cs0",
Dipen Dudhat00c42942011-01-20 16:29:35 +053014#if defined(CONFIG_SYS_CSPR0) && defined(CONFIG_SYS_CSOR0)
Pankit Garg92d443b2018-11-05 18:01:33 +000015 CONFIG_SYS_CSPR0,
Kumar Gala7bc4f622012-08-17 08:20:25 +000016#ifdef CONFIG_SYS_CSPR0_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +000017 CONFIG_SYS_CSPR0_EXT,
18#else
19 0,
Kumar Gala7bc4f622012-08-17 08:20:25 +000020#endif
Pankit Garg92d443b2018-11-05 18:01:33 +000021#ifdef CONFIG_SYS_AMASK0
22 CONFIG_SYS_AMASK0,
23#else
24 0,
25#endif
26 CONFIG_SYS_CSOR0,
27 {
28 CONFIG_SYS_CS0_FTIM0,
29 CONFIG_SYS_CS0_FTIM1,
30 CONFIG_SYS_CS0_FTIM2,
31 CONFIG_SYS_CS0_FTIM3,
32 },
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +053033#ifdef CONFIG_SYS_CSOR0_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +000034 CONFIG_SYS_CSOR0_EXT,
35#else
36 0,
37#endif
38#ifdef CONFIG_SYS_CSPR0_FINAL
39 CONFIG_SYS_CSPR0_FINAL,
40#else
41 0,
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +053042#endif
Pankit Garg92d443b2018-11-05 18:01:33 +000043#ifdef CONFIG_SYS_AMASK0_FINAL
44 CONFIG_SYS_AMASK0_FINAL,
45#else
46 0,
Dipen Dudhat00c42942011-01-20 16:29:35 +053047#endif
Poonam Aggrwal46b86ca2011-07-07 20:36:47 +053048#endif
Pankit Garg92d443b2018-11-05 18:01:33 +000049 },
Dipen Dudhat00c42942011-01-20 16:29:35 +053050
Pankit Garg92d443b2018-11-05 18:01:33 +000051#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 2
52 {
53 "cs1",
54#if defined(CONFIG_SYS_CSPR1) && defined(CONFIG_SYS_CSOR1)
55 CONFIG_SYS_CSPR1,
Kumar Gala7bc4f622012-08-17 08:20:25 +000056#ifdef CONFIG_SYS_CSPR1_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +000057 CONFIG_SYS_CSPR1_EXT,
58#else
59 0,
Kumar Gala7bc4f622012-08-17 08:20:25 +000060#endif
Pankit Garg92d443b2018-11-05 18:01:33 +000061#ifdef CONFIG_SYS_AMASK1
62 CONFIG_SYS_AMASK1,
63#else
64 0,
65#endif
66 CONFIG_SYS_CSOR1,
67 {
68 CONFIG_SYS_CS1_FTIM0,
69 CONFIG_SYS_CS1_FTIM1,
70 CONFIG_SYS_CS1_FTIM2,
71 CONFIG_SYS_CS1_FTIM3,
72 },
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +053073#ifdef CONFIG_SYS_CSOR1_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +000074 CONFIG_SYS_CSOR1_EXT,
75#else
76 0,
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +053077#endif
Pankit Garg92d443b2018-11-05 18:01:33 +000078#ifdef CONFIG_SYS_CSPR1_FINAL
79 CONFIG_SYS_CSPR1_FINAL,
80#else
81 0,
82#endif
83#ifdef CONFIG_SYS_AMASK1_FINAL
84 CONFIG_SYS_AMASK1_FINAL,
85#else
86 0,
87#endif
88#endif
89 },
Dipen Dudhat00c42942011-01-20 16:29:35 +053090#endif
91
Pankit Garg92d443b2018-11-05 18:01:33 +000092#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 3
93 {
94 "cs2",
95#if defined(CONFIG_SYS_CSPR2) && defined(CONFIG_SYS_CSOR2)
96 CONFIG_SYS_CSPR2,
Kumar Gala7bc4f622012-08-17 08:20:25 +000097#ifdef CONFIG_SYS_CSPR2_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +000098 CONFIG_SYS_CSPR2_EXT,
99#else
100 0,
Kumar Gala7bc4f622012-08-17 08:20:25 +0000101#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000102#ifdef CONFIG_SYS_AMASK2
103 CONFIG_SYS_AMASK2,
104#else
105 0,
106#endif
107 CONFIG_SYS_CSOR2,
108 {
109 CONFIG_SYS_CS2_FTIM0,
110 CONFIG_SYS_CS2_FTIM1,
111 CONFIG_SYS_CS2_FTIM2,
112 CONFIG_SYS_CS2_FTIM3,
113 },
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530114#ifdef CONFIG_SYS_CSOR2_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000115 CONFIG_SYS_CSOR2_EXT,
116#else
117 0,
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530118#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000119#ifdef CONFIG_SYS_CSPR2_FINAL
120 CONFIG_SYS_CSPR2_FINAL,
121#else
122 0,
123#endif
124#ifdef CONFIG_SYS_AMASK2_FINAL
125 CONFIG_SYS_AMASK2_FINAL,
126#else
127 0,
128#endif
129#endif
130 },
Dipen Dudhat00c42942011-01-20 16:29:35 +0530131#endif
132
Pankit Garg92d443b2018-11-05 18:01:33 +0000133#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 4
134 {
135 "cs3",
136#if defined(CONFIG_SYS_CSPR3) && defined(CONFIG_SYS_CSOR3)
137 CONFIG_SYS_CSPR3,
Kumar Gala7bc4f622012-08-17 08:20:25 +0000138#ifdef CONFIG_SYS_CSPR3_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000139 CONFIG_SYS_CSPR3_EXT,
140#else
141 0,
142#endif
143#ifdef CONFIG_SYS_AMASK3
144 CONFIG_SYS_AMASK3,
145#else
146 0,
Kumar Gala7bc4f622012-08-17 08:20:25 +0000147#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000148 CONFIG_SYS_CSOR3,
149 {
150 CONFIG_SYS_CS3_FTIM0,
151 CONFIG_SYS_CS3_FTIM1,
152 CONFIG_SYS_CS3_FTIM2,
153 CONFIG_SYS_CS3_FTIM3,
154 },
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530155#ifdef CONFIG_SYS_CSOR3_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000156 CONFIG_SYS_CSOR3_EXT,
157#else
158 0,
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530159#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000160#ifdef CONFIG_SYS_CSPR3_FINAL
161 CONFIG_SYS_CSPR3_FINAL,
162#else
163 0,
164#endif
165#ifdef CONFIG_SYS_AMASK3_FINAL
166 CONFIG_SYS_AMASK3_FINAL,
167#else
168 0,
169#endif
170#endif
171 },
Dipen Dudhat00c42942011-01-20 16:29:35 +0530172#endif
Mingkai Hu6f024c92013-05-16 10:18:13 +0800173
Pankit Garg92d443b2018-11-05 18:01:33 +0000174#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 5
175 {
176 "cs4",
177#if defined(CONFIG_SYS_CSPR4) && defined(CONFIG_SYS_CSOR4)
178 CONFIG_SYS_CSPR4,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800179#ifdef CONFIG_SYS_CSPR4_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000180 CONFIG_SYS_CSPR4_EXT,
181#else
182 0,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800183#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000184#ifdef CONFIG_SYS_AMASK4
185 CONFIG_SYS_AMASK4,
186#else
187 0,
188#endif
189 CONFIG_SYS_CSOR4,
190 {
191 CONFIG_SYS_CS4_FTIM0,
192 CONFIG_SYS_CS4_FTIM1,
193 CONFIG_SYS_CS4_FTIM2,
194 CONFIG_SYS_CS4_FTIM3,
195 },
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530196#ifdef CONFIG_SYS_CSOR4_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000197 CONFIG_SYS_CSOR4_EXT,
198#else
199 0,
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530200#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000201#ifdef CONFIG_SYS_CSPR4_FINAL
202 CONFIG_SYS_CSPR4_FINAL,
203#else
204 0,
205#endif
206#ifdef CONFIG_SYS_AMASK4_FINAL
207 CONFIG_SYS_AMASK4_FINAL,
208#else
209 0,
210#endif
211#endif
212 },
Mingkai Hu6f024c92013-05-16 10:18:13 +0800213#endif
214
Pankit Garg92d443b2018-11-05 18:01:33 +0000215#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 6
216 {
217 "cs5",
218#if defined(CONFIG_SYS_CSPR5) && defined(CONFIG_SYS_CSOR5)
219 CONFIG_SYS_CSPR5,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800220#ifdef CONFIG_SYS_CSPR5_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000221 CONFIG_SYS_CSPR5_EXT,
222#else
223 0,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800224#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000225#ifdef CONFIG_SYS_AMASK5
226 CONFIG_SYS_AMASK5,
227#else
228 0,
229#endif
230 CONFIG_SYS_CSOR5,
231 {
232 CONFIG_SYS_CS5_FTIM0,
233 CONFIG_SYS_CS5_FTIM1,
234 CONFIG_SYS_CS5_FTIM2,
235 CONFIG_SYS_CS5_FTIM3,
236 },
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530237#ifdef CONFIG_SYS_CSOR5_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000238 CONFIG_SYS_CSOR5_EXT,
239#else
240 0,
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530241#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000242#ifdef CONFIG_SYS_CSPR5_FINAL
243 CONFIG_SYS_CSPR5_FINAL,
244#else
245 0,
246#endif
247#ifdef CONFIG_SYS_AMASK5_FINAL
248 CONFIG_SYS_AMASK5_FINAL,
249#else
250 0,
251#endif
252#endif
253 },
Mingkai Hu6f024c92013-05-16 10:18:13 +0800254#endif
255
Pankit Garg92d443b2018-11-05 18:01:33 +0000256#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 7
257 {
258 "cs6",
259#if defined(CONFIG_SYS_CSPR6) && defined(CONFIG_SYS_CSOR6)
260 CONFIG_SYS_CSPR6,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800261#ifdef CONFIG_SYS_CSPR6_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000262 CONFIG_SYS_CSPR6_EXT,
263#else
264 0,
265#endif
266#ifdef CONFIG_SYS_AMASK6
267 CONFIG_SYS_AMASK6,
268#else
269 0,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800270#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000271 CONFIG_SYS_CSOR6,
272 {
273 CONFIG_SYS_CS6_FTIM0,
274 CONFIG_SYS_CS6_FTIM1,
275 CONFIG_SYS_CS6_FTIM2,
276 CONFIG_SYS_CS6_FTIM3,
277 },
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530278#ifdef CONFIG_SYS_CSOR6_EXT
Pankit Garg92d443b2018-11-05 18:01:33 +0000279 CONFIG_SYS_CSOR6_EXT,
280#else
281 0,
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530282#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000283#ifdef CONFIG_SYS_CSPR6_FINAL
284 CONFIG_SYS_CSPR6_FINAL,
285#else
286 0,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800287#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000288#ifdef CONFIG_SYS_AMASK6_FINAL
289 CONFIG_SYS_AMASK6_FINAL,
290#else
291 0,
Mingkai Hu6f024c92013-05-16 10:18:13 +0800292#endif
Prabhakar Kushwahaa3aaf1d2013-10-04 10:05:36 +0530293#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000294 },
Mingkai Hu6f024c92013-05-16 10:18:13 +0800295#endif
York Sund377b612014-03-19 13:52:34 -0700296
Pankit Garg92d443b2018-11-05 18:01:33 +0000297#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 8
298 {
299 "cs7",
300#if defined(CONFIG_SYS_CSPR7) && defined(CONFIG_SYS_CSOR7)
301 CONFIG_SYS_CSPR7,
302#ifdef CONFIG_SYS_CSPR7_EXT
303 CONFIG_SYS_CSPR7_EXT,
304#else
305 0,
York Sund377b612014-03-19 13:52:34 -0700306#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000307#ifdef CONFIG_SYS_AMASK7
308 CONFIG_SYS_AMASK7,
309#else
310 0,
Scott Wood8e728cd2015-03-24 13:25:02 -0700311#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000312 CONFIG_SYS_CSOR7,
313#ifdef CONFIG_SYS_CSOR7_EXT
314 CONFIG_SYS_CSOR7_EXT,
315#else
316 0,
Prabhakar Kushwaha1c56fb22015-03-19 09:20:48 -0700317#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000318 {
319 CONFIG_SYS_CS7_FTIM0,
320 CONFIG_SYS_CS7_FTIM1,
321 CONFIG_SYS_CS7_FTIM2,
322 CONFIG_SYS_CS7_FTIM3,
323 },
324#ifdef CONFIG_SYS_CSPR7_FINAL
325 CONFIG_SYS_CSPR7_FINAL,
326#else
327 0,
Scott Wood8e728cd2015-03-24 13:25:02 -0700328#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000329#ifdef CONFIG_SYS_AMASK7_FINAL
330 CONFIG_SYS_AMASK7_FINAL,
331#else
332 0,
Scott Wood8e728cd2015-03-24 13:25:02 -0700333#endif
Prabhakar Kushwaha1c56fb22015-03-19 09:20:48 -0700334#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000335 },
Scott Wood8e728cd2015-03-24 13:25:02 -0700336#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000337};
338
339__weak void ifc_cfg_boot_info(struct ifc_regs_info *regs_info)
340{
341 regs_info->regs = ifc_cfg_default_boot;
342 regs_info->cs_size = CONFIG_SYS_FSL_IFC_BANK_COUNT;
343}
Rajesh Bhagat76e1d472018-12-27 04:37:51 +0000344#endif
Pankit Garg92d443b2018-11-05 18:01:33 +0000345
346void print_ifc_regs(void)
347{
348 int i, j;
349
350 printf("IFC Controller Registers\n");
351 for (i = 0; i < CONFIG_SYS_FSL_IFC_BANK_COUNT; i++) {
352 printf("CSPR%d:0x%08X\tAMASK%d:0x%08X\tCSOR%d:0x%08X\n",
353 i, get_ifc_cspr(i), i, get_ifc_amask(i),
354 i, get_ifc_csor(i));
355 for (j = 0; j < 4; j++)
356 printf("IFC_FTIM%d:0x%08X\n", j, get_ifc_ftim(i, j));
357 }
358}
359
Rajesh Bhagat76e1d472018-12-27 04:37:51 +0000360#ifdef CONFIG_TFABOOT
Pankit Garg92d443b2018-11-05 18:01:33 +0000361void init_early_memctl_regs(void)
362{
363 int i, j;
364 struct ifc_regs *regs;
365 struct ifc_regs_info regs_info = {0};
366
367 ifc_cfg_boot_info(&regs_info);
368 regs = regs_info.regs;
369
370 for (i = 0 ; i < regs_info.cs_size; i++) {
371 if (regs[i].pr && (regs[i].pr & CSPR_V)) {
372 /* skip setting cspr/csor_ext in below condition */
373 if (!(CONFIG_IS_ENABLED(A003399_NOR_WORKAROUND) &&
374 i == 0 &&
375 ((regs[0].pr & CSPR_MSEL) == CSPR_MSEL_NOR))) {
376 if (regs[i].pr_ext)
377 set_ifc_cspr_ext(i, regs[i].pr_ext);
378 if (regs[i].or_ext)
379 set_ifc_csor_ext(i, regs[i].or_ext);
380 }
381
382 for (j = 0; j < ARRAY_SIZE(regs->ftim); j++)
383 set_ifc_ftim(i, j, regs[i].ftim[j]);
384
385 set_ifc_csor(i, regs[i].or);
386 set_ifc_amask(i, regs[i].amask);
387 set_ifc_cspr(i, regs[i].pr);
388 }
389 }
390}
391
392void init_final_memctl_regs(void)
393{
394 int i;
395 struct ifc_regs *regs;
396 struct ifc_regs_info regs_info;
397
398 ifc_cfg_boot_info(&regs_info);
399 regs = regs_info.regs;
400
401 for (i = 0 ; i < regs_info.cs_size && i < ARRAY_SIZE(regs->ftim); i++) {
402 if (!(regs[i].pr_final & CSPR_V))
403 continue;
404 if (regs[i].pr_final)
405 set_ifc_cspr(i, regs[i].pr_final);
406 if (regs[i].amask_final)
407 set_ifc_amask(i, (i == 1) ? regs[i].amask_final :
408 regs[i].amask);
409 }
York Sund377b612014-03-19 13:52:34 -0700410}
Rajesh Bhagat76e1d472018-12-27 04:37:51 +0000411#else
412void init_early_memctl_regs(void)
413{
414#if defined(CONFIG_SYS_CSPR0) && defined(CONFIG_SYS_CSOR0)
415 set_ifc_ftim(IFC_CS0, IFC_FTIM0, CONFIG_SYS_CS0_FTIM0);
416 set_ifc_ftim(IFC_CS0, IFC_FTIM1, CONFIG_SYS_CS0_FTIM1);
417 set_ifc_ftim(IFC_CS0, IFC_FTIM2, CONFIG_SYS_CS0_FTIM2);
418 set_ifc_ftim(IFC_CS0, IFC_FTIM3, CONFIG_SYS_CS0_FTIM3);
419
420#ifndef CONFIG_A003399_NOR_WORKAROUND
421#ifdef CONFIG_SYS_CSPR0_EXT
422 set_ifc_cspr_ext(IFC_CS0, CONFIG_SYS_CSPR0_EXT);
423#endif
424#ifdef CONFIG_SYS_CSOR0_EXT
425 set_ifc_csor_ext(IFC_CS0, CONFIG_SYS_CSOR0_EXT);
426#endif
427 set_ifc_cspr(IFC_CS0, CONFIG_SYS_CSPR0);
428 set_ifc_amask(IFC_CS0, CONFIG_SYS_AMASK0);
429 set_ifc_csor(IFC_CS0, CONFIG_SYS_CSOR0);
430#endif
431#endif
432
433#ifdef CONFIG_SYS_CSPR1_EXT
434 set_ifc_cspr_ext(IFC_CS1, CONFIG_SYS_CSPR1_EXT);
435#endif
436#ifdef CONFIG_SYS_CSOR1_EXT
437 set_ifc_csor_ext(IFC_CS1, CONFIG_SYS_CSOR1_EXT);
438#endif
439#if defined(CONFIG_SYS_CSPR1) && defined(CONFIG_SYS_CSOR1)
440 set_ifc_ftim(IFC_CS1, IFC_FTIM0, CONFIG_SYS_CS1_FTIM0);
441 set_ifc_ftim(IFC_CS1, IFC_FTIM1, CONFIG_SYS_CS1_FTIM1);
442 set_ifc_ftim(IFC_CS1, IFC_FTIM2, CONFIG_SYS_CS1_FTIM2);
443 set_ifc_ftim(IFC_CS1, IFC_FTIM3, CONFIG_SYS_CS1_FTIM3);
444
445 set_ifc_csor(IFC_CS1, CONFIG_SYS_CSOR1);
446 set_ifc_amask(IFC_CS1, CONFIG_SYS_AMASK1);
447 set_ifc_cspr(IFC_CS1, CONFIG_SYS_CSPR1);
448#endif
449
450#ifdef CONFIG_SYS_CSPR2_EXT
451 set_ifc_cspr_ext(IFC_CS2, CONFIG_SYS_CSPR2_EXT);
452#endif
453#ifdef CONFIG_SYS_CSOR2_EXT
454 set_ifc_csor_ext(IFC_CS2, CONFIG_SYS_CSOR2_EXT);
455#endif
456#if defined(CONFIG_SYS_CSPR2) && defined(CONFIG_SYS_CSOR2)
457 set_ifc_ftim(IFC_CS2, IFC_FTIM0, CONFIG_SYS_CS2_FTIM0);
458 set_ifc_ftim(IFC_CS2, IFC_FTIM1, CONFIG_SYS_CS2_FTIM1);
459 set_ifc_ftim(IFC_CS2, IFC_FTIM2, CONFIG_SYS_CS2_FTIM2);
460 set_ifc_ftim(IFC_CS2, IFC_FTIM3, CONFIG_SYS_CS2_FTIM3);
461
462 set_ifc_csor(IFC_CS2, CONFIG_SYS_CSOR2);
463 set_ifc_amask(IFC_CS2, CONFIG_SYS_AMASK2);
464 set_ifc_cspr(IFC_CS2, CONFIG_SYS_CSPR2);
465#endif
466
467#ifdef CONFIG_SYS_CSPR3_EXT
468 set_ifc_cspr_ext(IFC_CS3, CONFIG_SYS_CSPR3_EXT);
469#endif
470#ifdef CONFIG_SYS_CSOR3_EXT
471 set_ifc_csor_ext(IFC_CS3, CONFIG_SYS_CSOR3_EXT);
472#endif
473#if defined(CONFIG_SYS_CSPR3) && defined(CONFIG_SYS_CSOR3)
474 set_ifc_ftim(IFC_CS3, IFC_FTIM0, CONFIG_SYS_CS3_FTIM0);
475 set_ifc_ftim(IFC_CS3, IFC_FTIM1, CONFIG_SYS_CS3_FTIM1);
476 set_ifc_ftim(IFC_CS3, IFC_FTIM2, CONFIG_SYS_CS3_FTIM2);
477 set_ifc_ftim(IFC_CS3, IFC_FTIM3, CONFIG_SYS_CS3_FTIM3);
478
479 set_ifc_cspr(IFC_CS3, CONFIG_SYS_CSPR3);
480 set_ifc_amask(IFC_CS3, CONFIG_SYS_AMASK3);
481 set_ifc_csor(IFC_CS3, CONFIG_SYS_CSOR3);
482#endif
483
484#ifdef CONFIG_SYS_CSPR4_EXT
485 set_ifc_cspr_ext(IFC_CS4, CONFIG_SYS_CSPR4_EXT);
486#endif
487#ifdef CONFIG_SYS_CSOR4_EXT
488 set_ifc_csor_ext(IFC_CS4, CONFIG_SYS_CSOR4_EXT);
489#endif
490#if defined(CONFIG_SYS_CSPR4) && defined(CONFIG_SYS_CSOR4)
491 set_ifc_ftim(IFC_CS4, IFC_FTIM0, CONFIG_SYS_CS4_FTIM0);
492 set_ifc_ftim(IFC_CS4, IFC_FTIM1, CONFIG_SYS_CS4_FTIM1);
493 set_ifc_ftim(IFC_CS4, IFC_FTIM2, CONFIG_SYS_CS4_FTIM2);
494 set_ifc_ftim(IFC_CS4, IFC_FTIM3, CONFIG_SYS_CS4_FTIM3);
495
496 set_ifc_cspr(IFC_CS4, CONFIG_SYS_CSPR4);
497 set_ifc_amask(IFC_CS4, CONFIG_SYS_AMASK4);
498 set_ifc_csor(IFC_CS4, CONFIG_SYS_CSOR4);
499#endif
500
501#ifdef CONFIG_SYS_CSPR5_EXT
502 set_ifc_cspr_ext(IFC_CS5, CONFIG_SYS_CSPR5_EXT);
503#endif
504#ifdef CONFIG_SYS_CSOR5_EXT
505 set_ifc_csor_ext(IFC_CS5, CONFIG_SYS_CSOR5_EXT);
506#endif
507#if defined(CONFIG_SYS_CSPR5) && defined(CONFIG_SYS_CSOR5)
508 set_ifc_ftim(IFC_CS5, IFC_FTIM0, CONFIG_SYS_CS5_FTIM0);
509 set_ifc_ftim(IFC_CS5, IFC_FTIM1, CONFIG_SYS_CS5_FTIM1);
510 set_ifc_ftim(IFC_CS5, IFC_FTIM2, CONFIG_SYS_CS5_FTIM2);
511 set_ifc_ftim(IFC_CS5, IFC_FTIM3, CONFIG_SYS_CS5_FTIM3);
512
513 set_ifc_cspr(IFC_CS5, CONFIG_SYS_CSPR5);
514 set_ifc_amask(IFC_CS5, CONFIG_SYS_AMASK5);
515 set_ifc_csor(IFC_CS5, CONFIG_SYS_CSOR5);
516#endif
517
518#ifdef CONFIG_SYS_CSPR6_EXT
519 set_ifc_cspr_ext(IFC_CS6, CONFIG_SYS_CSPR6_EXT);
520#endif
521#ifdef CONFIG_SYS_CSOR6_EXT
522 set_ifc_csor_ext(IFC_CS6, CONFIG_SYS_CSOR6_EXT);
523#endif
524#if defined(CONFIG_SYS_CSPR6) && defined(CONFIG_SYS_CSOR6)
525 set_ifc_ftim(IFC_CS6, IFC_FTIM0, CONFIG_SYS_CS6_FTIM0);
526 set_ifc_ftim(IFC_CS6, IFC_FTIM1, CONFIG_SYS_CS6_FTIM1);
527 set_ifc_ftim(IFC_CS6, IFC_FTIM2, CONFIG_SYS_CS6_FTIM2);
528 set_ifc_ftim(IFC_CS6, IFC_FTIM3, CONFIG_SYS_CS6_FTIM3);
529
530 set_ifc_cspr(IFC_CS6, CONFIG_SYS_CSPR6);
531 set_ifc_amask(IFC_CS6, CONFIG_SYS_AMASK6);
532 set_ifc_csor(IFC_CS6, CONFIG_SYS_CSOR6);
533#endif
534
535#ifdef CONFIG_SYS_CSPR7_EXT
536 set_ifc_cspr_ext(IFC_CS7, CONFIG_SYS_CSPR7_EXT);
537#endif
538#ifdef CONFIG_SYS_CSOR7_EXT
539 set_ifc_csor_ext(IFC_CS7, CONFIG_SYS_CSOR7_EXT);
540#endif
541#if defined(CONFIG_SYS_CSPR7) && defined(CONFIG_SYS_CSOR7)
542 set_ifc_ftim(IFC_CS7, IFC_FTIM0, CONFIG_SYS_CS7_FTIM0);
543 set_ifc_ftim(IFC_CS7, IFC_FTIM1, CONFIG_SYS_CS7_FTIM1);
544 set_ifc_ftim(IFC_CS7, IFC_FTIM2, CONFIG_SYS_CS7_FTIM2);
545 set_ifc_ftim(IFC_CS7, IFC_FTIM3, CONFIG_SYS_CS7_FTIM3);
546
547 set_ifc_cspr(IFC_CS7, CONFIG_SYS_CSPR7);
548 set_ifc_amask(IFC_CS7, CONFIG_SYS_AMASK7);
549 set_ifc_csor(IFC_CS7, CONFIG_SYS_CSOR7);
550#endif
551}
552
553void init_final_memctl_regs(void)
554{
555#ifdef CONFIG_SYS_CSPR0_FINAL
556 set_ifc_cspr(IFC_CS0, CONFIG_SYS_CSPR0_FINAL);
557#endif
558#ifdef CONFIG_SYS_AMASK0_FINAL
559 set_ifc_amask(IFC_CS0, CONFIG_SYS_AMASK0);
560#endif
561#ifdef CONFIG_SYS_CSPR1_FINAL
562 set_ifc_cspr(IFC_CS1, CONFIG_SYS_CSPR1_FINAL);
563#endif
564#ifdef CONFIG_SYS_AMASK1_FINAL
565 set_ifc_amask(IFC_CS1, CONFIG_SYS_AMASK1_FINAL);
566#endif
567#ifdef CONFIG_SYS_CSPR2_FINAL
568 set_ifc_cspr(IFC_CS2, CONFIG_SYS_CSPR2_FINAL);
569#endif
570#ifdef CONFIG_SYS_AMASK2_FINAL
571 set_ifc_amask(IFC_CS2, CONFIG_SYS_AMASK2);
572#endif
573#ifdef CONFIG_SYS_CSPR3_FINAL
574 set_ifc_cspr(IFC_CS3, CONFIG_SYS_CSPR3_FINAL);
575#endif
576#ifdef CONFIG_SYS_AMASK3_FINAL
577 set_ifc_amask(IFC_CS3, CONFIG_SYS_AMASK3);
578#endif
579}
580#endif