Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 317bdb25bb3d41191995f45ba992aa1eb2e25c17 / . / configs / chromebook_bob_defconfig
blob: 1807e838223a6a5320d450f55db5cb56aad04ef7 [file] [log] [blame]
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=24000000
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]5CONFIG_TEXT_BASE=0x00200000
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]6CONFIG_SPL_GPIO=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=1
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]8CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
9CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]10CONFIG_SF_DEFAULT_SPEED=20000000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]11CONFIG_ENV_OFFSET=0x3F8000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-bob"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]13CONFIG_SPL_TEXT_BASE=0xff8c2000
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]14CONFIG_DM_RESET=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]15CONFIG_ROCKCHIP_RK3399=y
16CONFIG_ROCKCHIP_BOOT_MODE_REG=0
17CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]18# CONFIG_SPL_MMC is not set
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]19CONFIG_SPL_STACK=0xff8effff
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]20CONFIG_DEBUG_UART_BASE=0xff1a0000
21CONFIG_DEBUG_UART_CLOCK=24000000
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]22CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]23CONFIG_SPL_SPI=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]24CONFIG_SYS_LOAD_ADDR=0x800800
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]25CONFIG_DEBUG_UART=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]26CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
27# CONFIG_DISPLAY_CPUINFO is not set
28CONFIG_DISPLAY_BOARDINFO_LATE=y
Alper Nebi Yasakf55f3882020-10-28 00:15:11 +0300[diff] [blame]29CONFIG_BOARD_EARLY_INIT_R=y
Alper Nebi Yasakb99a52e2021-12-24 16:43:45 +0300[diff] [blame]30CONFIG_MISC_INIT_R=y
Alper Nebi Yasakf55f3882020-10-28 00:15:11 +0300[diff] [blame]31CONFIG_BLOBLIST=y
Alper Nebi Yasakf55f3882020-10-28 00:15:11 +0300[diff] [blame]32CONFIG_BLOBLIST_ADDR=0x100000
Tom Rini5ca768d2022-01-24 21:08:41 +0000[diff] [blame]33CONFIG_BLOBLIST_SIZE=0x1000
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]34CONFIG_SPL_MAX_SIZE=0x2e000
35CONFIG_SPL_PAD_TO=0x7f8000
Tom Rini65aa1242022-05-27 10:19:45 -0400[diff] [blame]36CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
37CONFIG_SPL_BSS_START_ADDR=0xff8e0000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]38CONFIG_SPL_BSS_MAX_SIZE=0x10000
Alper Nebi Yasakf55f3882020-10-28 00:15:11 +0300[diff] [blame]39CONFIG_HANDOFF=y
Kever Yang20673542019-08-20 11:47:02 +0800[diff] [blame]40# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]41# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]42CONFIG_SPL_STACK_R=y
43CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
44CONFIG_SPL_SPI_LOAD=y
Tom Rinie22fa4f2021-08-10 15:08:46 -0400[diff] [blame]45CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
Quentin Schulz95edee72023-06-21 18:02:52 +0200[diff] [blame]46CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]47CONFIG_CMD_BOOTZ=y
48CONFIG_CMD_GPIO=y
49CONFIG_CMD_GPT=y
50CONFIG_CMD_I2C=y
51CONFIG_CMD_MMC=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]52CONFIG_CMD_SF_TEST=y
53CONFIG_CMD_SPI=y
54CONFIG_CMD_USB=y
55# CONFIG_CMD_SETEXPR is not set
56CONFIG_CMD_TIME=y
57CONFIG_CMD_PMIC=y
58CONFIG_CMD_REGULATOR=y
59CONFIG_CMD_LOG=y
60CONFIG_SPL_OF_CONTROL=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]61CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
62CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]63CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Simon Glassd8b214c2020-07-19 13:55:56 -0600[diff] [blame]64CONFIG_SPL_DM_SEQ_ALIAS=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]65CONFIG_ROCKCHIP_GPIO=y
66CONFIG_I2C_CROS_EC_TUNNEL=y
67CONFIG_SYS_I2C_ROCKCHIP=y
68CONFIG_I2C_MUX=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]69CONFIG_CROS_EC_KEYB=y
Alper Nebi Yasakb99a52e2021-12-24 16:43:45 +0300[diff] [blame]70CONFIG_MISC=y
71CONFIG_ROCKCHIP_EFUSE=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]72CONFIG_CROS_EC=y
73CONFIG_CROS_EC_SPI=y
74CONFIG_PWRSEQ=y
Jaehoon Chunge711c972021-02-16 10:16:56 +0900[diff] [blame]75CONFIG_MMC_PWRSEQ=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]76CONFIG_MMC_DW=y
77CONFIG_MMC_DW_ROCKCHIP=y
78CONFIG_MMC_SDHCI=y
79CONFIG_MMC_SDHCI_ROCKCHIP=y
Simon Glassd8b214c2020-07-19 13:55:56 -0600[diff] [blame]80CONFIG_SF_DEFAULT_BUS=1
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]81CONFIG_SPI_FLASH_GIGADEVICE=y
Alper Nebi Yasakb99a52e2021-12-24 16:43:45 +0300[diff] [blame]82CONFIG_SPI_FLASH_WINBOND=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]83CONFIG_ETH_DESIGNWARE=y
84CONFIG_GMAC_ROCKCHIP=y
Alper Nebi Yasakb99a52e2021-12-24 16:43:45 +0300[diff] [blame]85CONFIG_PHY_ROCKCHIP_INNO_USB2=y
86CONFIG_PHY_ROCKCHIP_TYPEC=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]87CONFIG_PMIC_RK8XX=y
88CONFIG_REGULATOR_PWM=y
Alper Nebi Yasakb99a52e2021-12-24 16:43:45 +0300[diff] [blame]89CONFIG_DM_REGULATOR_GPIO=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]90CONFIG_REGULATOR_RK8XX=y
Alper Nebi Yasakb99a52e2021-12-24 16:43:45 +0300[diff] [blame]91CONFIG_PWM_CROS_EC=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]92CONFIG_PWM_ROCKCHIP=y
Alper Nebi Yasakb99a52e2021-12-24 16:43:45 +0300[diff] [blame]93CONFIG_DM_RNG=y
94CONFIG_RNG_ROCKCHIP=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]95CONFIG_DEBUG_UART_SHIFT=2
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]96CONFIG_SYS_NS16550_MEM32=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]97CONFIG_ROCKCHIP_SPI=y
98CONFIG_SYSRESET=y
99CONFIG_USB=y
100CONFIG_USB_XHCI_HCD=y
101CONFIG_USB_XHCI_DWC3=y
102CONFIG_USB_EHCI_HCD=y
103CONFIG_USB_EHCI_GENERIC=y
Alper Nebi Yasakb99a52e2021-12-24 16:43:45 +0300[diff] [blame]104CONFIG_USB_OHCI_HCD=y
105CONFIG_USB_OHCI_GENERIC=y
106CONFIG_USB_DWC3=y
107CONFIG_USB_KEYBOARD=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]108CONFIG_USB_HOST_ETHER=y
109CONFIG_USB_ETHER_ASIX=y
110CONFIG_USB_ETHER_ASIX88179=y
111CONFIG_USB_ETHER_MCS7830=y
112CONFIG_USB_ETHER_RTL8152=y
113CONFIG_USB_ETHER_SMSC95XX=y
Simon Glass52cb5042022-10-18 07:46:31 -0600[diff] [blame]114CONFIG_VIDEO=y
Alper Nebi Yasakb99a52e2021-12-24 16:43:45 +0300[diff] [blame]115CONFIG_DISPLAY=y
116CONFIG_VIDEO_ROCKCHIP=y
117CONFIG_VIDEO_ROCKCHIP_MAX_XRES=1280
118CONFIG_VIDEO_ROCKCHIP_MAX_YRES=800
119CONFIG_DISPLAY_ROCKCHIP_EDP=y
Simon Glass8fbf9922019-01-21 14:53:36 -0700[diff] [blame]120CONFIG_CMD_DHRYSTONE=y
121CONFIG_ERRNO_STR=y