Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Joe Hershberger | 911c606 | 2011-11-11 15:55:37 -0600 | [diff] [blame] | 2 | |
| 3 | #ifndef _MPC83XX_GPIO_H_ |
| 4 | #define _MPC83XX_GPIO_H_ |
| 5 | |
| 6 | /* |
| 7 | * The MCP83xx's 1-2 GPIO controllers each with 32 bits. |
| 8 | */ |
Tom Rini | d9e6ef5 | 2021-05-14 21:34:27 -0400 | [diff] [blame] | 9 | #if defined(CONFIG_ARCH_MPC8313) || defined(CONFIG_ARCH_MPC8308) |
Joe Hershberger | 911c606 | 2011-11-11 15:55:37 -0600 | [diff] [blame] | 10 | #define MPC83XX_GPIO_CTRLRS 1 |
Holger Brunck | 5c13bd1 | 2022-08-19 16:55:06 +0200 | [diff] [blame] | 11 | #elif defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_ARCH_MPC837X) |
Joe Hershberger | 911c606 | 2011-11-11 15:55:37 -0600 | [diff] [blame] | 12 | #define MPC83XX_GPIO_CTRLRS 2 |
| 13 | #else |
| 14 | #define MPC83XX_GPIO_CTRLRS 0 |
| 15 | #endif |
| 16 | |
| 17 | #define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS) |
| 18 | |
Mario Six | 5dec9e6 | 2019-01-21 09:18:08 +0100 | [diff] [blame] | 19 | struct mpc8xxx_gpio_plat { |
| 20 | ulong addr; |
| 21 | unsigned long size; |
| 22 | uint ngpios; |
| 23 | }; |
| 24 | |
Christophe Leroy | d4f79cb | 2023-02-21 19:31:11 +0100 | [diff] [blame] | 25 | struct qe_gpio_plat { |
| 26 | ulong addr; |
| 27 | unsigned long size; |
| 28 | }; |
| 29 | |
Mario Six | 5dec9e6 | 2019-01-21 09:18:08 +0100 | [diff] [blame] | 30 | #ifndef DM_GPIO |
Joe Hershberger | 911c606 | 2011-11-11 15:55:37 -0600 | [diff] [blame] | 31 | void mpc83xx_gpio_init_f(void); |
| 32 | void mpc83xx_gpio_init_r(void); |
Mario Six | 5dec9e6 | 2019-01-21 09:18:08 +0100 | [diff] [blame] | 33 | #endif /* DM_GPIO */ |
Joe Hershberger | 911c606 | 2011-11-11 15:55:37 -0600 | [diff] [blame] | 34 | |
| 35 | #endif /* MPC83XX_GPIO_H_ */ |