blob: 05f09d7600b803a183709121eeed33d1d21bb840 [file] [log] [blame]
Ramneek Mehreshf4de4072015-05-29 14:47:19 +05301/*
2 * Copyright 2015 Freescale Semiconductor, Inc.
3 *
4 * FSL USB HOST xHCI Controller
5 *
6 * Author: Ramneek Mehresh<ramneek.mehresh@freescale.com>
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11#include <common.h>
12#include <usb.h>
13#include <asm-generic/errno.h>
Ramneek Mehreshf4de4072015-05-29 14:47:19 +053014#include <linux/compat.h>
15#include <linux/usb/xhci-fsl.h>
16#include <linux/usb/dwc3.h>
17#include "xhci.h"
18
19/* Declare global data pointer */
20DECLARE_GLOBAL_DATA_PTR;
21
22static struct fsl_xhci fsl_xhci;
23unsigned long ctr_addr[] = FSL_USB_XHCI_ADDR;
24
25__weak int __board_usb_init(int index, enum usb_init_type init)
26{
27 return 0;
28}
29
Ramneek Mehreshf4de4072015-05-29 14:47:19 +053030static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
31{
32 int ret = 0;
33
34 ret = dwc3_core_init(fsl_xhci->dwc3_reg);
35 if (ret) {
36 debug("%s:failed to initialize core\n", __func__);
37 return ret;
38 }
39
40 /* We are hard-coding DWC3 core to Host Mode */
41 dwc3_set_mode(fsl_xhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST);
42
Nikhil Badola807babb2015-06-23 09:17:49 +053043 /* Set GFLADJ_30MHZ as 20h as per XHCI spec default value */
44 dwc3_set_fladj(fsl_xhci->dwc3_reg, GFLADJ_30MHZ_DEFAULT);
45
Ramneek Mehreshf4de4072015-05-29 14:47:19 +053046 return ret;
47}
48
49static int fsl_xhci_core_exit(struct fsl_xhci *fsl_xhci)
50{
51 /*
52 * Currently fsl socs do not support PHY shutdown from
53 * sw. But this support may be added in future socs.
54 */
55 return 0;
56}
57
58int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
59{
60 struct fsl_xhci *ctx = &fsl_xhci;
61 int ret = 0;
62
63 ctx->hcd = (struct xhci_hccr *)ctr_addr[index];
64 ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET);
65
66 ret = board_usb_init(index, USB_INIT_HOST);
67 if (ret != 0) {
68 puts("Failed to initialize board for USB\n");
69 return ret;
70 }
71
72 ret = fsl_xhci_core_init(ctx);
73 if (ret < 0) {
74 puts("Failed to initialize xhci\n");
75 return ret;
76 }
77
78 *hccr = (struct xhci_hccr *)ctx->hcd;
Nikhil Badola05a18f42015-06-23 09:17:32 +053079 *hcor = (struct xhci_hcor *)((uintptr_t) *hccr
Ramneek Mehreshf4de4072015-05-29 14:47:19 +053080 + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase)));
81
Nikhil Badola05a18f42015-06-23 09:17:32 +053082 debug("fsl-xhci: init hccr %lx and hcor %lx hc_length %lx\n",
83 (uintptr_t)*hccr, (uintptr_t)*hcor,
84 (uintptr_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase)));
Ramneek Mehreshf4de4072015-05-29 14:47:19 +053085
86 return ret;
87}
88
89void xhci_hcd_stop(int index)
90{
91 struct fsl_xhci *ctx = &fsl_xhci;
92
93 fsl_xhci_core_exit(ctx);
94}