Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 31587aee6550eb5c8f6837db58040ae9274680ca / . / drivers / usb / host / ohci-sunxi.c
blob: 1b1f651697836c7f0a693c20144e8338b51f783c [file] [log] [blame]
Hans de Goede804fa572015-05-10 14:10:27 +0200[diff] [blame]1/*
2 * Sunxi ohci glue
3 *
4 * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com>
5 *
6 * Based on code from
7 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12#include <common.h>
13#include <asm/arch/clock.h>
14#include <asm/arch/usb_phy.h>
15#include <asm/io.h>
16#include <dm.h>
17#include <usb.h>
18#include "ohci.h"
19
20struct ohci_sunxi_priv {
21 ohci_t ohci;
22 int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
23 int usb_gate_mask; /* Mask of usb_clk_cfg clk gate bits for this hcd */
24 int phy_index; /* Index of the usb-phy attached to this hcd */
25};
26
27static int ohci_usb_probe(struct udevice *dev)
28{
29 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
30 struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
31 struct ohci_sunxi_priv *priv = dev_get_priv(dev);
32 struct ohci_regs *regs = (struct ohci_regs *)dev_get_addr(dev);
33
34 bus_priv->companion = true;
35
36 /*
37 * This should go away once we've moved to the driver model for
38 * clocks resp. phys.
39 */
Jelle van der Waaa1f5d112016-02-09 23:59:33 +0100[diff] [blame]40 priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
41#ifdef CONFIG_MACH_SUN8I_H3
42 priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_EHCI0;
43#endif
44 priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
45 priv->phy_index = ((u32)regs - (SUNXI_USB1_BASE + 0x400)) / 0x1000 + 1;
46 priv->ahb_gate_mask <<= priv->phy_index - 1;
47 priv->usb_gate_mask <<= priv->phy_index - 1;
Hans de Goede804fa572015-05-10 14:10:27 +0200[diff] [blame]48
49 setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
50 setbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask);
51#ifdef CONFIG_SUNXI_GEN_SUN6I
52 setbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
53#endif
54
55 sunxi_usb_phy_init(priv->phy_index);
56 sunxi_usb_phy_power_on(priv->phy_index);
57
58 return ohci_register(dev, regs);
59}
60
61static int ohci_usb_remove(struct udevice *dev)
62{
63 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
64 struct ohci_sunxi_priv *priv = dev_get_priv(dev);
65 int ret;
66
67 ret = ohci_deregister(dev);
68 if (ret)
69 return ret;
70
Hans de Goede804fa572015-05-10 14:10:27 +0200[diff] [blame]71 sunxi_usb_phy_exit(priv->phy_index);
72
73#ifdef CONFIG_SUNXI_GEN_SUN6I
74 clrbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
75#endif
76 clrbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask);
77 clrbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
78
79 return 0;
80}
81
82static const struct udevice_id ohci_usb_ids[] = {
83 { .compatible = "allwinner,sun4i-a10-ohci", },
84 { .compatible = "allwinner,sun5i-a13-ohci", },
85 { .compatible = "allwinner,sun6i-a31-ohci", },
86 { .compatible = "allwinner,sun7i-a20-ohci", },
87 { .compatible = "allwinner,sun8i-a23-ohci", },
Jelle van der Waaa1f5d112016-02-09 23:59:33 +0100[diff] [blame]88 { .compatible = "allwinner,sun8i-h3-ohci", },
Hans de Goede804fa572015-05-10 14:10:27 +0200[diff] [blame]89 { .compatible = "allwinner,sun9i-a80-ohci", },
90 { }
91};
92
93U_BOOT_DRIVER(usb_ohci) = {
94 .name = "ohci_sunxi",
95 .id = UCLASS_USB,
96 .of_match = ohci_usb_ids,
97 .probe = ohci_usb_probe,
98 .remove = ohci_usb_remove,
99 .ops = &ohci_usb_ops,
100 .platdata_auto_alloc_size = sizeof(struct usb_platdata),
101 .priv_auto_alloc_size = sizeof(struct ohci_sunxi_priv),
102 .flags = DM_FLAG_ALLOC_PRIV_DMA,
103};