blob: 01ea86217c0ecfcee9b9c597ad1a79c411147a2c [file] [log] [blame]
York Sunf0626592013-09-30 09:22:09 -07001#
York Sun2896cb72014-03-27 17:54:47 -07002# Copyright 2008-2014 Freescale Semiconductor, Inc.
York Sunf0626592013-09-30 09:22:09 -07003#
Tom Rini0cab3ec2015-11-10 01:06:16 +00004# SPDX-License-Identifier: GPL-2.0
York Sunf0626592013-09-30 09:22:09 -07005#
6
York Sun2896cb72014-03-27 17:54:47 -07007obj-$(CONFIG_SYS_FSL_DDR1) += main.o util.o ctrl_regs.o options.o \
8 lc_common_dimm_params.o
9obj-$(CONFIG_SYS_FSL_DDR2) += main.o util.o ctrl_regs.o options.o \
10 lc_common_dimm_params.o
11obj-$(CONFIG_SYS_FSL_DDR3) += main.o util.o ctrl_regs.o options.o \
12 lc_common_dimm_params.o
13obj-$(CONFIG_SYS_FSL_DDR4) += main.o util.o ctrl_regs.o options.o \
14 lc_common_dimm_params.o
York Sunf0626592013-09-30 09:22:09 -070015
York Sunf0626592013-09-30 09:22:09 -070016ifdef CONFIG_DDR_SPD
17SPD := y
18endif
19ifdef CONFIG_SPD_EEPROM
20SPD := y
21endif
22ifdef SPD
23obj-$(CONFIG_SYS_FSL_DDR1) += ddr1_dimm_params.o
24obj-$(CONFIG_SYS_FSL_DDR2) += ddr2_dimm_params.o
25obj-$(CONFIG_SYS_FSL_DDR3) += ddr3_dimm_params.o
York Sun2896cb72014-03-27 17:54:47 -070026obj-$(CONFIG_SYS_FSL_DDR4) += ddr4_dimm_params.o
York Sunf0626592013-09-30 09:22:09 -070027endif
28
29obj-$(CONFIG_FSL_DDR_INTERACTIVE) += interactive.o
30obj-$(CONFIG_SYS_FSL_DDRC_GEN1) += mpc85xx_ddr_gen1.o
31obj-$(CONFIG_SYS_FSL_DDRC_GEN2) += mpc85xx_ddr_gen2.o
32obj-$(CONFIG_SYS_FSL_DDRC_GEN3) += mpc85xx_ddr_gen3.o
33obj-$(CONFIG_SYS_FSL_DDR_86XX) += mpc86xx_ddr.o
York Sun461c9392013-09-30 14:20:51 -070034obj-$(CONFIG_SYS_FSL_DDRC_ARM_GEN3) += arm_ddr_gen3.o
York Sun2896cb72014-03-27 17:54:47 -070035obj-$(CONFIG_SYS_FSL_DDRC_GEN4) += fsl_ddr_gen4.o