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TsiChungLiewfc3ca3b62007-08-16 15:05:11 -05001/*
2 *
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Alison Wang8d8dac92012-03-26 21:49:08 +00006 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -05007 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050010 */
11
12#include <common.h>
13#include <watchdog.h>
14#include <command.h>
Ben Warren2f2b6b62008-08-31 22:22:04 -070015#include <netdev.h>
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050016
17#include <asm/immap.h>
Alison Wang8d8dac92012-03-26 21:49:08 +000018#include <asm/io.h>
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050019
20DECLARE_GLOBAL_DATA_PTR;
21
Mike Frysinger6d1f6982010-10-20 03:41:17 -040022int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050023{
Alison Wang8d8dac92012-03-26 21:49:08 +000024 rcm_t *rcm = (rcm_t *) (MMAP_RCM);
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050025 udelay(1000);
Alison Wangfdc2fb12012-10-18 19:25:51 +000026 out_8(&rcm->rcr, RCM_RCR_FRCRSTOUT);
27 udelay(10000);
Alison Wang8d8dac92012-03-26 21:49:08 +000028 setbits_8(&rcm->rcr, RCM_RCR_SOFTRST);
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050029
30 /* we don't return! */
31 return 0;
32};
33
Angelo Dureghello3146b4d2017-08-20 00:01:55 +020034#if defined(CONFIG_DISPLAY_CPUINFO)
35int print_cpuinfo(void)
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050036{
Alison Wang8d8dac92012-03-26 21:49:08 +000037 ccm_t *ccm = (ccm_t *) MMAP_CCM;
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050038 u16 msk;
39 u16 id = 0;
40 u8 ver;
41
42 puts("CPU: ");
Alison Wang8d8dac92012-03-26 21:49:08 +000043 msk = (in_be16(&ccm->cir) >> 6);
44 ver = (in_be16(&ccm->cir) & 0x003f);
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050045 switch (msk) {
46 case 0x48:
47 id = 54455;
48 break;
49 case 0x49:
50 id = 54454;
51 break;
52 case 0x4a:
53 id = 54453;
54 break;
55 case 0x4b:
56 id = 54452;
57 break;
58 case 0x4d:
59 id = 54451;
60 break;
61 case 0x4f:
62 id = 54450;
63 break;
Alison Wangfdc2fb12012-10-18 19:25:51 +000064 case 0x9F:
65 id = 54410;
66 break;
67 case 0xA0:
68 id = 54415;
69 break;
70 case 0xA1:
71 id = 54416;
72 break;
73 case 0xA2:
74 id = 54417;
75 break;
76 case 0xA3:
77 id = 54418;
78 break;
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050079 }
80
81 if (id) {
Wolfgang Denk20591042008-10-19 02:35:49 +020082 char buf1[32], buf2[32], buf3[32];
83
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050084 printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
85 ver);
Wolfgang Denk20591042008-10-19 02:35:49 +020086 printf(" CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
87 strmhz(buf1, gd->cpu_clk),
88 strmhz(buf2, gd->bus_clk),
Simon Glass568a7b62012-12-13 20:49:07 +000089 strmhz(buf3, gd->arch.flb_clk));
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050090#ifdef CONFIG_PCI
Wolfgang Denk20591042008-10-19 02:35:49 +020091 printf(" PCI CLK %s MHz INP CLK %s MHz VCO CLK %s MHz\n",
92 strmhz(buf1, gd->pci_clk),
Simon Glass568a7b62012-12-13 20:49:07 +000093 strmhz(buf2, gd->arch.inp_clk),
94 strmhz(buf3, gd->arch.vco_clk));
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050095#else
Wolfgang Denk20591042008-10-19 02:35:49 +020096 printf(" INP CLK %s MHz VCO CLK %s MHz\n",
Simon Glass568a7b62012-12-13 20:49:07 +000097 strmhz(buf1, gd->arch.inp_clk),
98 strmhz(buf2, gd->arch.vco_clk));
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050099#endif
100 }
101
102 return 0;
103}
Angelo Dureghello3146b4d2017-08-20 00:01:55 +0200104#endif /* CONFIG_DISPLAY_CPUINFO */
Ben Warren90c96db2008-08-26 22:16:25 -0700105
106#if defined(CONFIG_MCFFEC)
107/* Default initializations for MCFFEC controllers. To override,
108 * create a board-specific function called:
109 * int board_eth_init(bd_t *bis)
110 */
111
Ben Warren90c96db2008-08-26 22:16:25 -0700112int cpu_eth_init(bd_t *bis)
113{
114 return mcffec_initialize(bis);
115}
116#endif