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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Peng Fan186585c2016-12-11 19:24:37 +08002/*
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
Peng Fan186585c2016-12-11 19:24:37 +08004 */
5
Simon Glassa7b51302019-11-14 12:57:46 -07006#include <init.h>
Peng Fan186585c2016-12-11 19:24:37 +08007#include <asm/arch/clock.h>
8#include <asm/arch/crm_regs.h>
9#include <asm/arch/iomux.h>
10#include <asm/arch/imx-regs.h>
11#include <asm/arch/mx6-pins.h>
12#include <asm/arch/sys_proto.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060013#include <asm/global_data.h>
Peng Fan186585c2016-12-11 19:24:37 +080014#include <asm/gpio.h>
Stefano Babic33731bc2017-06-29 10:16:06 +020015#include <asm/mach-imx/iomux-v3.h>
16#include <asm/mach-imx/boot_mode.h>
Peng Fan186585c2016-12-11 19:24:37 +080017#include <asm/io.h>
18#include <common.h>
19#include <linux/sizes.h>
20#include <mmc.h>
21#include <power/pmic.h>
22#include <power/pfuze100_pmic.h>
23#include "../common/pfuze.h"
24
25DECLARE_GLOBAL_DATA_PTR;
26
Peng Fan186585c2016-12-11 19:24:37 +080027int dram_init(void)
28{
29 gd->ram_size = imx_ddr_size();
30
31 return 0;
32}
33
Peng Fan186585c2016-12-11 19:24:37 +080034static iomux_v3_cfg_t const wdog_pads[] = {
35 MX6_PAD_WDOG_B__WDOG1_B | MUX_PAD_CTRL(NO_PAD_CTRL),
36};
37
Peng Fan186585c2016-12-11 19:24:37 +080038#ifdef CONFIG_DM_PMIC_PFUZE100
39int power_init_board(void)
40{
41 struct udevice *dev;
42 int ret;
43 u32 dev_id, rev_id, i;
44 u32 switch_num = 6;
45 u32 offset = PFUZE100_SW1CMODE;
46
Peng Fan43194a02022-11-07 16:00:10 +080047 ret = pmic_get("pfuze100@8", &dev);
Peng Fan186585c2016-12-11 19:24:37 +080048 if (ret == -ENODEV)
49 return 0;
50
51 if (ret != 0)
52 return ret;
53
54 dev_id = pmic_reg_read(dev, PFUZE100_DEVICEID);
55 rev_id = pmic_reg_read(dev, PFUZE100_REVID);
56 printf("PMIC: PFUZE100! DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
57
58
59 /* Init mode to APS_PFM */
60 pmic_reg_write(dev, PFUZE100_SW1ABMODE, APS_PFM);
61
62 for (i = 0; i < switch_num - 1; i++)
63 pmic_reg_write(dev, offset + i * SWITCH_SIZE, APS_PFM);
64
65 /* set SW1AB staby volatage 0.975V */
66 pmic_clrsetbits(dev, PFUZE100_SW1ABSTBY, 0x3f, 0x1b);
67
68 /* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
69 pmic_clrsetbits(dev, PFUZE100_SW1ABCONF, 0xc0, 0x40);
70
71 /* set SW1C staby volatage 0.975V */
72 pmic_clrsetbits(dev, PFUZE100_SW1CSTBY, 0x3f, 0x1b);
73
74 /* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */
75 pmic_clrsetbits(dev, PFUZE100_SW1CCONF, 0xc0, 0x40);
76
77 return 0;
78}
79#endif
80
81int board_early_init_f(void)
82{
Peng Fan186585c2016-12-11 19:24:37 +080083 return 0;
84}
85
86int board_init(void)
87{
88 /* Address of boot parameters */
89 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
90
91 return 0;
92}
93
94int board_late_init(void)
95{
96 imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
97
98 return 0;
99}
100
101int checkboard(void)
102{
103 puts("Board: MX6SLL EVK\n");
104
105 return 0;
106}
107
108int board_mmc_get_env_dev(int devno)
109{
110 return devno;
111}
112
113int mmc_map_to_kernel_blk(int devno)
114{
115 return devno;
116}