Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2016 Stefan Roese <sr@denx.de> |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 4 | */ |
| 5 | |
Stefan Roese | 5c806f1 | 2016-10-25 10:56:19 +0200 | [diff] [blame] | 6 | #ifndef _CONFIG_MVEBU_ARMADA_8K_H |
| 7 | #define _CONFIG_MVEBU_ARMADA_8K_H |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 8 | |
| 9 | /* |
| 10 | * High Level Configuration Options (easy to change) |
| 11 | */ |
| 12 | #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ |
| 13 | |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 14 | /* additions for new ARM relocation support */ |
| 15 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
| 16 | |
| 17 | #define CONFIG_NR_DRAM_BANKS 1 |
| 18 | |
| 19 | /* auto boot */ |
| 20 | #define CONFIG_PREBOOT |
| 21 | |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 22 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ |
| 23 | 115200, 230400, 460800, 921600 } |
| 24 | |
| 25 | /* |
| 26 | * For booting Linux, the board info and command line data |
| 27 | * have to be in the first 8 MB of memory, since this is |
| 28 | * the maximum mapped by the Linux kernel during initialization. |
| 29 | */ |
| 30 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| 31 | #define CONFIG_INITRD_TAG /* enable INITRD tag */ |
| 32 | #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ |
| 33 | |
| 34 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 35 | |
| 36 | /* |
| 37 | * Size of malloc() pool |
| 38 | */ |
| 39 | #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */ |
| 40 | |
| 41 | /* |
| 42 | * Other required minimal configurations |
| 43 | */ |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 44 | #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 45 | #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ |
| 46 | #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ |
| 47 | #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ |
| 48 | #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ |
| 49 | #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
| 50 | |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 51 | /* End of 16M scrubbed by training in bootrom */ |
| 52 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) |
| 53 | |
| 54 | /* |
| 55 | * SPI Flash configuration |
| 56 | */ |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 57 | #define CONFIG_ENV_SPI_BUS 0 |
| 58 | #define CONFIG_ENV_SPI_CS 0 |
| 59 | |
| 60 | /* SPI NOR flash default params, used by sf commands */ |
| 61 | #define CONFIG_SF_DEFAULT_SPEED 1000000 |
| 62 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 |
| 63 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE |
| 64 | |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 65 | #define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */ |
| 66 | #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ |
| 67 | #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ |
| 68 | |
Konstantin Porotchkin | 0edf772 | 2017-04-05 18:22:33 +0300 | [diff] [blame] | 69 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 70 | #define CONFIG_SYS_NAND_MAX_CHIPS 1 |
| 71 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 72 | #define CONFIG_SYS_NAND_USE_FLASH_BBT |
| 73 | |
Stefan Roese | 97c3ba0 | 2017-02-20 12:25:26 +0100 | [diff] [blame] | 74 | /* |
| 75 | * Ethernet Driver configuration |
| 76 | */ |
| 77 | #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ |
Stefan Roese | 97c3ba0 | 2017-02-20 12:25:26 +0100 | [diff] [blame] | 78 | #define CONFIG_ARP_TIMEOUT 200 |
| 79 | #define CONFIG_NET_RETRY_COUNT 50 |
| 80 | |
Bin Meng | abe4026 | 2017-07-19 21:50:06 +0800 | [diff] [blame] | 81 | #define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3) |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 82 | |
| 83 | /* USB ethernet */ |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 84 | |
| 85 | /* |
| 86 | * SATA/SCSI/AHCI configuration |
| 87 | */ |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 88 | #define CONFIG_SCSI_AHCI_PLAT |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 89 | #define CONFIG_LBA48 |
| 90 | #define CONFIG_SYS_64BIT_LBA |
| 91 | |
| 92 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 |
| 93 | #define CONFIG_SYS_SCSI_MAX_LUN 1 |
| 94 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ |
| 95 | CONFIG_SYS_SCSI_MAX_LUN) |
| 96 | |
Stefan Roese | c20e9d5 | 2016-10-27 13:36:45 +0200 | [diff] [blame] | 97 | /* |
| 98 | * PCI configuration |
| 99 | */ |
| 100 | #ifdef CONFIG_PCIE_DW_MVEBU |
| 101 | #define CONFIG_E1000 |
Stefan Roese | c20e9d5 | 2016-10-27 13:36:45 +0200 | [diff] [blame] | 102 | #endif |
| 103 | |
Mark Kettenis | 8cfb67b | 2018-03-17 09:34:27 +0100 | [diff] [blame] | 104 | #define BOOT_TARGET_DEVICES(func) \ |
| 105 | func(MMC, mmc, 1) \ |
| 106 | func(MMC, mmc, 0) \ |
| 107 | func(USB, usb, 0) \ |
| 108 | func(SCSI, scsi, 0) \ |
| 109 | func(PXE, pxe, na) \ |
| 110 | func(DHCP, dhcp, na) |
| 111 | |
| 112 | #include <config_distro_bootcmd.h> |
| 113 | |
| 114 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 115 | "scriptaddr=0x4d00000\0" \ |
| 116 | "pxefile_addr_r=0x4e00000\0" \ |
| 117 | "fdt_addr_r=0x4f00000\0" \ |
| 118 | "kernel_addr_r=0x5000000\0" \ |
| 119 | "ramdisk_addr_r=0x8000000\0" \ |
| 120 | "fdtfile=marvell/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ |
| 121 | BOOTENV |
| 122 | |
Stefan Roese | 5c806f1 | 2016-10-25 10:56:19 +0200 | [diff] [blame] | 123 | #endif /* _CONFIG_MVEBU_ARMADA_8K_H */ |