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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics STM32 Timers
8
9description: |
10 This hardware block provides 3 types of timer along with PWM functionality:
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
12 by a programmable prescaler, break input feature, PWM outputs and
13 complementary PWM outputs channels.
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
15 driven by a programmable prescaler and PWM outputs.
16 - basic timers consist of a 16-bit auto-reload counter driven by a
17 programmable prescaler.
18
19maintainers:
20 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
21
22properties:
23 compatible:
24 const: st,stm32-timers
25
26 reg:
27 maxItems: 1
28
29 clocks:
30 maxItems: 1
31
32 clock-names:
33 items:
34 - const: int
35
36 resets:
37 maxItems: 1
38
39 dmas:
40 minItems: 1
41 maxItems: 7
42
43 dma-names:
44 items:
45 enum: [ ch1, ch2, ch3, ch4, up, trig, com ]
46 minItems: 1
47 maxItems: 7
48
49 interrupts:
50 oneOf:
51 - maxItems: 1
52 - maxItems: 4
53
54 interrupt-names:
55 oneOf:
56 - items:
57 - const: global
58 - items:
59 - const: brk
60 - const: up
61 - const: trg-com
62 - const: cc
63
64 "#address-cells":
65 const: 1
66
67 "#size-cells":
68 const: 0
69
Tom Rini762f85b2024-07-20 11:15:10 -060070 access-controllers:
71 minItems: 1
72 maxItems: 2
73
Tom Rini53633a82024-02-29 12:33:36 -050074 pwm:
75 type: object
76 additionalProperties: false
77
78 properties:
79 compatible:
80 const: st,stm32-pwm
81
82 "#pwm-cells":
83 const: 3
84
85 st,breakinput:
86 description:
87 One or two <index level filter> to describe break input
88 configurations.
89 $ref: /schemas/types.yaml#/definitions/uint32-matrix
90 items:
91 items:
92 - description: |
93 "index" indicates on which break input (0 or 1) the
94 configuration should be applied.
95 enum: [0, 1]
96 - description: |
97 "level" gives the active level (0=low or 1=high) of the
98 input signal for this configuration
99 enum: [0, 1]
100 - description: |
101 "filter" gives the filtering value (up to 15) to be applied.
102 maximum: 15
103 minItems: 1
104 maxItems: 2
105
106 required:
107 - "#pwm-cells"
108 - compatible
109
110 counter:
111 type: object
112 additionalProperties: false
113
114 properties:
115 compatible:
116 const: st,stm32-timer-counter
117
118 required:
119 - compatible
120
121patternProperties:
122 "^timer@[0-9]+$":
123 type: object
124 additionalProperties: false
125
126 properties:
127 compatible:
128 enum:
129 - st,stm32-timer-trigger
130 - st,stm32h7-timer-trigger
131
132 reg:
133 description: Identify trigger hardware block.
134 items:
135 minimum: 0
136 maximum: 16
137
138 required:
139 - compatible
140 - reg
141
142required:
143 - compatible
144 - reg
145 - clocks
146 - clock-names
147
148additionalProperties: false
149
150examples:
151 - |
152 #include <dt-bindings/clock/stm32mp1-clks.h>
153 timers2: timer@40000000 {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 compatible = "st,stm32-timers";
157 reg = <0x40000000 0x400>;
158 clocks = <&rcc TIM2_K>;
159 clock-names = "int";
160 dmas = <&dmamux1 18 0x400 0x1>,
161 <&dmamux1 19 0x400 0x1>,
162 <&dmamux1 20 0x400 0x1>,
163 <&dmamux1 21 0x400 0x1>,
164 <&dmamux1 22 0x400 0x1>;
165 dma-names = "ch1", "ch2", "ch3", "ch4", "up";
166 pwm {
167 compatible = "st,stm32-pwm";
168 #pwm-cells = <3>;
169 st,breakinput = <0 1 5>;
170 };
171 timer@1 {
172 compatible = "st,stm32-timer-trigger";
173 reg = <1>;
174 };
175 counter {
176 compatible = "st,stm32-timer-counter";
177 };
178 };
179
180...