| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | # Copyright 2020 thingy.jp. |
| 3 | %YAML 1.2 |
| 4 | --- |
| 5 | $id: http://devicetree.org/schemas/arm/mstar/mstar,smpctrl.yaml# |
| 6 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 7 | |
| 8 | title: MStar/SigmaStar Armv7 SoC SMP control registers |
| 9 | |
| 10 | maintainers: |
| 11 | - Daniel Palmer <daniel@thingy.jp> |
| 12 | |
| 13 | description: | |
| 14 | MStar/SigmaStar's Armv7 SoCs that have more than one processor |
| 15 | have a region of registers that allow setting the boot address |
| 16 | and a magic number that allows secondary processors to leave |
| 17 | the loop they are parked in by the boot ROM. |
| 18 | |
| 19 | properties: |
| 20 | compatible: |
| 21 | items: |
| 22 | - enum: |
| 23 | - sstar,ssd201-smpctrl # SSD201/SSD202D |
| 24 | - const: mstar,smpctrl |
| 25 | |
| 26 | reg: |
| 27 | maxItems: 1 |
| 28 | |
| 29 | required: |
| 30 | - compatible |
| 31 | - reg |
| 32 | |
| 33 | additionalProperties: false |
| 34 | |
| 35 | examples: |
| 36 | - | |
| 37 | smpctrl@204000 { |
| 38 | compatible = "sstar,ssd201-smpctrl", "mstar,smpctrl"; |
| 39 | reg = <0x204000 0x200>; |
| 40 | }; |