Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 30d4d2b047e16abe9222eca525152aa76b0f6a51 / . / configs / meesc_dataflash_defconfig
blob: 9d4c9ebff9b7fc35da661db65010afc54efa2f50 [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_ARM=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]2CONFIG_ARCH_CPU_INIT=y
Masahiro Yamadaaf908ee2015-02-20 17:04:01 +0900[diff] [blame]3CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x21F00000
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]5CONFIG_TARGET_MEESC=y
Wenyou.Yang@microchip.comcc2eca02017-07-21 17:06:40 +0800[diff] [blame]6CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=1
Markus Klotzbuecher7bd60e62019-05-15 15:15:54 +0200[diff] [blame]8CONFIG_ENV_SIZE=0x4200
9CONFIG_ENV_OFFSET=0x4200
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]10CONFIG_ENV_SECT_SIZE=0x210
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]11CONFIG_DM_GPIO=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]13CONFIG_FIT=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]14CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]15CONFIG_BOOTDELAY=3
Simon Glass4be229d2019-07-20 20:51:14 -0600[diff] [blame]16CONFIG_USE_PREBOOT=y
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]17CONFIG_BOARD_EARLY_INIT_F=y
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]18CONFIG_MISC_INIT_R=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]19CONFIG_HUSH_PARSER=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]20# CONFIG_CMD_BDI is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]21CONFIG_CMD_BOOTZ=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]22# CONFIG_CMD_LOADS is not set
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]23# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]24CONFIG_CMD_DHCP=y
25CONFIG_CMD_PING=y
Wenyou.Yang@microchip.comcc2eca02017-07-21 17:06:40 +0800[diff] [blame]26CONFIG_OF_CONTROL=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]27CONFIG_ENV_IS_IN_SPI_FLASH=y
Patrick Delaunayf8e932e2019-02-27 15:20:38 +0100[diff] [blame]28CONFIG_USE_ENV_SPI_MAX_HZ=y
29CONFIG_ENV_SPI_MAX_HZ=15000000
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]30CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Wenyou.Yang@microchip.comcc2eca02017-07-21 17:06:40 +0800[diff] [blame]31CONFIG_DM=y
32CONFIG_CLK=y
33CONFIG_CLK_AT91=y
Wenyou.Yang@microchip.comcc2eca02017-07-21 17:06:40 +0800[diff] [blame]34CONFIG_AT91_GPIO=y
35# CONFIG_MMC is not set
Miquel Raynal803baa22019-10-03 19:50:08 +0200[diff] [blame]36CONFIG_MTD=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]37CONFIG_DM_SPI_FLASH=y
Wenyou.Yang@microchip.comcc2eca02017-07-21 17:06:40 +0800[diff] [blame]38CONFIG_SPI_FLASH_ATMEL=y
39CONFIG_SPI_FLASH_DATAFLASH=y
40CONFIG_PINCTRL=y
41CONFIG_PINCTRL_AT91=y
42CONFIG_DM_SERIAL=y
43CONFIG_ATMEL_USART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]44CONFIG_SPI=y
Wenyou.Yang@microchip.comcc2eca02017-07-21 17:06:40 +0800[diff] [blame]45CONFIG_DM_SPI=y