Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Configuration settings for the TechNexion TAO-3530 SOM |
| 3 | * equipped on Thunder baseboard. |
| 4 | * |
| 5 | * Edward Lin <linuxfae@technexion.com> |
| 6 | * Tapani Utriainen <linuxfae@technexion.com> |
| 7 | * |
Stefan Roese | fa7a0f9 | 2013-12-04 09:27:34 +0100 | [diff] [blame] | 8 | * Copyright (C) 2013 Stefan Roese <sr@denx.de> |
| 9 | * |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 10 | * SPDX-License-Identifier: GPL-2.0+ |
| 11 | */ |
| 12 | |
| 13 | #ifndef __CONFIG_H |
| 14 | #define __CONFIG_H |
| 15 | |
| 16 | /* |
| 17 | * High Level Configuration Options |
| 18 | */ |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 19 | #define CONFIG_OMAP /* in a TI OMAP core */ |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 20 | |
| 21 | #define CONFIG_OMAP_GPIO |
| 22 | #define CONFIG_OMAP_COMMON |
Nishanth Menon | 3e46e3e | 2015-03-09 17:12:08 -0500 | [diff] [blame] | 23 | /* Common ARM Erratas */ |
| 24 | #define CONFIG_ARM_ERRATA_454179 |
| 25 | #define CONFIG_ARM_ERRATA_430973 |
| 26 | #define CONFIG_ARM_ERRATA_621766 |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 27 | |
| 28 | #define MACH_TYPE_OMAP3_TAO3530 2836 |
| 29 | |
| 30 | #define CONFIG_SDRC /* Has an SDRC controller */ |
| 31 | |
| 32 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
Nishanth Menon | fa96c96 | 2015-03-09 17:12:04 -0500 | [diff] [blame] | 33 | #include <asm/arch/omap.h> |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 34 | |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 35 | /* Clock Defines */ |
| 36 | #define V_OSCK 26000000 /* Clock output from T2 */ |
| 37 | #define V_SCLK (V_OSCK >> 1) |
| 38 | |
| 39 | #define CONFIG_MISC_INIT_R |
| 40 | |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 41 | #define CONFIG_CMDLINE_TAG |
| 42 | #define CONFIG_SETUP_MEMORY_TAGS |
| 43 | #define CONFIG_INITRD_TAG |
| 44 | #define CONFIG_REVISION_TAG |
| 45 | |
| 46 | /* |
| 47 | * Size of malloc() pool |
| 48 | */ |
| 49 | #define CONFIG_SYS_MALLOC_LEN (4 << 20) |
| 50 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ |
| 51 | |
| 52 | /* |
| 53 | * Hardware drivers |
| 54 | */ |
| 55 | |
| 56 | /* |
| 57 | * NS16550 Configuration |
| 58 | */ |
| 59 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
| 60 | |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 61 | #define CONFIG_SYS_NS16550_SERIAL |
| 62 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 63 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
| 64 | |
| 65 | /* |
| 66 | * select serial console configuration |
| 67 | */ |
| 68 | #define CONFIG_CONS_INDEX 3 |
| 69 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
| 70 | |
| 71 | /* allow to overwrite serial and ethaddr */ |
| 72 | #define CONFIG_ENV_OVERWRITE |
| 73 | #define CONFIG_BAUDRATE 115200 |
| 74 | #define CONFIG_GENERIC_MMC |
| 75 | #define CONFIG_MMC |
| 76 | #define CONFIG_OMAP_HSMMC |
| 77 | #define CONFIG_DOS_PARTITION |
| 78 | |
Stefan Roese | faee0e5 | 2014-02-14 09:47:17 +0100 | [diff] [blame] | 79 | /* GPIO banks */ |
| 80 | #define CONFIG_OMAP3_GPIO_2 /* GPIO32 ..63 is in GPIO bank 2 */ |
| 81 | #define CONFIG_OMAP3_GPIO_3 /* GPIO64 ..95 is in GPIO bank 3 */ |
| 82 | #define CONFIG_OMAP3_GPIO_4 /* GPIO96 ..127 is in GPIO bank 4 */ |
| 83 | #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */ |
| 84 | #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */ |
| 85 | |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 86 | /* commands to include */ |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 87 | #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ |
| 88 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
| 89 | #define MTDIDS_DEFAULT "nand0=nand" |
| 90 | #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ |
| 91 | "1920k(u-boot),128k(u-boot-env),"\ |
| 92 | "4m(kernel),-(fs)" |
| 93 | |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 94 | #define CONFIG_CMD_NAND /* NAND support */ |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 95 | |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 96 | #define CONFIG_SYS_NO_FLASH |
| 97 | #define CONFIG_SYS_I2C |
| 98 | #define CONFIG_SYS_I2C_OMAP34XX |
| 99 | #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 |
| 100 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 |
| 101 | #define CONFIG_I2C_MULTI_BUS |
| 102 | |
| 103 | /* |
| 104 | * TWL4030 |
| 105 | */ |
| 106 | #define CONFIG_TWL4030_POWER |
| 107 | #define CONFIG_TWL4030_LED |
| 108 | |
| 109 | /* |
| 110 | * Board NAND Info. |
| 111 | */ |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 112 | #define CONFIG_NAND_OMAP_GPMC |
| 113 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
| 114 | /* to access nand */ |
| 115 | #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ |
| 116 | /* to access nand at */ |
| 117 | /* CS0 */ |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 118 | |
| 119 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ |
| 120 | /* devices */ |
Stefano Babic | 0cd4118 | 2015-07-26 15:18:15 +0200 | [diff] [blame] | 121 | #define CONFIG_SYS_NAND_BUSWIDTH_16BIT |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 122 | /* Environment information */ |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 123 | |
| 124 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 125 | "loadaddr=0x82000000\0" \ |
| 126 | "console=ttyO2,115200n8\0" \ |
| 127 | "mpurate=600\0" \ |
| 128 | "dvi_mode=omapfb.mode=dvi:1280x720-24@60\0" \ |
| 129 | "tv_mode=omapfb.mode=tv:ntsc\0" \ |
| 130 | "video_mode=omapdss.def_disp=lcd vram=6M omapfb.vram=0:2M,1:2M,2:2M\0" \ |
| 131 | "lcd_mode=omapfb.mode=lcd:800x480@60 \0" \ |
| 132 | "extra_options= \0" \ |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 133 | "mmcdev=0\0" \ |
| 134 | "mmcroot=/dev/mmcblk0p2 rw\0" \ |
| 135 | "mmcrootfstype=ext3 rootwait\0" \ |
| 136 | "nandroot=ubi0:rootfs ubi.mtd=4\0" \ |
| 137 | "nandrootfstype=ubifs\0" \ |
| 138 | "mmcargs=setenv bootargs console=${console} " \ |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 139 | "mpurate=${mpurate} " \ |
| 140 | "${video_mode} " \ |
| 141 | "root=${mmcroot} " \ |
| 142 | "rootfstype=${mmcrootfstype} " \ |
| 143 | "${extra_options}\0" \ |
| 144 | "nandargs=setenv bootargs console=${console} " \ |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 145 | "mpurate=${mpurate} " \ |
| 146 | "${video_mode} " \ |
| 147 | "${network_setting} " \ |
| 148 | "root=${nandroot} " \ |
| 149 | "rootfstype=${nandrootfstype} "\ |
| 150 | "${extra_options}\0" \ |
| 151 | "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
| 152 | "bootscript=echo Running bootscript from mmc ...; " \ |
| 153 | "source ${loadaddr}\0" \ |
| 154 | "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ |
| 155 | "mmcboot=echo Booting from mmc ...; " \ |
| 156 | "run mmcargs; " \ |
| 157 | "bootm ${loadaddr}\0" \ |
| 158 | "nandboot=echo Booting from nand ...; " \ |
| 159 | "run nandargs; " \ |
| 160 | "nand read ${loadaddr} 280000 400000; " \ |
| 161 | "bootm ${loadaddr}\0" \ |
| 162 | |
| 163 | #define CONFIG_BOOTCOMMAND \ |
| 164 | "if mmc rescan ${mmcdev}; then " \ |
| 165 | "if run loadbootscript; then " \ |
| 166 | "run bootscript; " \ |
| 167 | "else " \ |
| 168 | "if run loaduimage; then " \ |
| 169 | "run mmcboot; " \ |
| 170 | "else run nandboot; " \ |
| 171 | "fi; " \ |
| 172 | "fi; " \ |
| 173 | "else run nandboot; fi" |
| 174 | |
| 175 | /* |
| 176 | * Miscellaneous configurable options |
| 177 | */ |
| 178 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 179 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 180 | |
| 181 | /* turn on command-line edit/hist/auto */ |
| 182 | #define CONFIG_CMDLINE_EDITING |
| 183 | #define CONFIG_COMMAND_HISTORY |
| 184 | #define CONFIG_AUTO_COMPLETE |
| 185 | |
| 186 | /* Print Buffer Size */ |
| 187 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 188 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 189 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 190 | /* Boot Argument Buffer Size */ |
| 191 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) |
| 192 | |
| 193 | #define CONFIG_SYS_ALT_MEMTEST 1 |
| 194 | #define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */ |
| 195 | /* defaults */ |
| 196 | #define CONFIG_SYS_MEMTEST_END (0x83FFFFFF) /* 64MB */ |
| 197 | #define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */ |
| 198 | |
| 199 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ |
| 200 | /* load address */ |
| 201 | #define CONFIG_SYS_TEXT_BASE 0x80008000 |
| 202 | |
| 203 | /* |
| 204 | * OMAP3 has 12 GP timers, they can be driven by the system clock |
| 205 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
| 206 | * This rate is divided by a local divisor. |
| 207 | */ |
| 208 | #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) |
| 209 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
| 210 | |
| 211 | /* |
| 212 | * Stack sizes |
| 213 | * |
| 214 | * The stack sizes are set up in start.S using the settings below |
| 215 | */ |
| 216 | #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ |
| 217 | |
| 218 | /* |
| 219 | * Physical Memory Map |
| 220 | */ |
| 221 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
| 222 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
| 223 | #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ |
| 224 | #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 |
| 225 | |
| 226 | /* |
| 227 | * FLASH and environment organization |
| 228 | */ |
| 229 | |
| 230 | /* **** PISMO SUPPORT *** */ |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 231 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ |
pekon gupta | 0a9ec45 | 2014-07-18 17:59:41 +0530 | [diff] [blame] | 232 | #define CONFIG_SYS_FLASH_BASE NAND_BASE |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 233 | |
| 234 | /* Monitor at start of flash */ |
| 235 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
| 236 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP |
| 237 | |
| 238 | #define CONFIG_ENV_IS_IN_NAND 1 |
| 239 | #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ |
| 240 | #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ |
| 241 | |
| 242 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) |
| 243 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET |
| 244 | #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET |
| 245 | |
| 246 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 247 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
| 248 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 |
| 249 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| 250 | CONFIG_SYS_INIT_RAM_SIZE - \ |
| 251 | GENERATED_GBL_DATA_SIZE) |
| 252 | |
| 253 | #define CONFIG_OMAP3_SPI |
| 254 | |
| 255 | /* |
| 256 | * USB |
| 257 | * |
| 258 | * Currently only EHCI is enabled, the MUSB OTG controller |
| 259 | * is not enabled. |
| 260 | */ |
| 261 | |
| 262 | /* USB EHCI */ |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 263 | #define CONFIG_USB_EHCI |
| 264 | #define CONFIG_USB_EHCI_OMAP |
| 265 | #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 162 |
| 266 | |
| 267 | #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 |
| 268 | #define CONFIG_USB_HOST_ETHER |
| 269 | #define CONFIG_USB_ETHER_SMSC95XX |
| 270 | |
| 271 | #define CONFIG_USB_ETHER |
| 272 | #define CONFIG_USB_ETHER_RNDIS |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 273 | #define CONGIG_CMD_STORAGE |
| 274 | |
Stefan Roese | fa7a0f9 | 2013-12-04 09:27:34 +0100 | [diff] [blame] | 275 | /* Defines for SPL */ |
Stefan Roese | fa7a0f9 | 2013-12-04 09:27:34 +0100 | [diff] [blame] | 276 | #define CONFIG_SPL_FRAMEWORK |
| 277 | #define CONFIG_SPL_NAND_SIMPLE |
| 278 | |
Paul Kocialkowski | 341e8cd | 2014-11-08 23:14:55 +0100 | [diff] [blame] | 279 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
Guillaume GARDET | 602a16c | 2014-10-15 17:53:11 +0200 | [diff] [blame] | 280 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
Stefan Roese | fa7a0f9 | 2013-12-04 09:27:34 +0100 | [diff] [blame] | 281 | |
| 282 | #define CONFIG_SPL_BOARD_INIT |
Stefan Roese | fa7a0f9 | 2013-12-04 09:27:34 +0100 | [diff] [blame] | 283 | #define CONFIG_SPL_NAND_BASE |
| 284 | #define CONFIG_SPL_NAND_DRIVERS |
| 285 | #define CONFIG_SPL_NAND_ECC |
Stefan Roese | fa7a0f9 | 2013-12-04 09:27:34 +0100 | [diff] [blame] | 286 | #define CONFIG_SPL_OMAP3_ID_NAND |
| 287 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" |
| 288 | |
| 289 | /* NAND boot config */ |
| 290 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
| 291 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 |
| 292 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 |
| 293 | #define CONFIG_SYS_NAND_OOBSIZE 64 |
| 294 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) |
| 295 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS |
| 296 | /* |
| 297 | * Use the ECC/OOB layout from omap_gpmc.h that matches your chip: |
| 298 | * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT |
| 299 | */ |
| 300 | #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ |
| 301 | 10, 11, 12, 13 } |
| 302 | #define CONFIG_SYS_NAND_ECCSIZE 512 |
| 303 | #define CONFIG_SYS_NAND_ECCBYTES 3 |
| 304 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW |
| 305 | |
| 306 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE |
| 307 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 |
| 308 | |
| 309 | #define CONFIG_SPL_TEXT_BASE 0x40200800 |
Tom Rini | cfff4aa | 2016-08-26 13:30:43 -0400 | [diff] [blame] | 310 | #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ |
| 311 | CONFIG_SPL_TEXT_BASE) |
Stefan Roese | fa7a0f9 | 2013-12-04 09:27:34 +0100 | [diff] [blame] | 312 | |
| 313 | /* |
| 314 | * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the |
| 315 | * older x-loader implementations. And move the BSS area so that it |
| 316 | * doesn't overlap with TEXT_BASE. |
| 317 | */ |
| 318 | #define CONFIG_SYS_TEXT_BASE 0x80008000 |
| 319 | #define CONFIG_SPL_BSS_START_ADDR 0x80100000 |
| 320 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ |
| 321 | |
| 322 | #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 |
| 323 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 |
| 324 | |
Tapani Utriainen | 0555083 | 2013-12-04 09:27:33 +0100 | [diff] [blame] | 325 | #endif /* __CONFIG_H */ |