Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 1 | /* |
| 2 | * include/configs/silk.h |
| 3 | * This file is silk board configuration. |
| 4 | * |
| 5 | * Copyright (C) 2015 Renesas Electronics Corporation |
| 6 | * Copyright (C) 2015 Cogent Embedded, Inc. |
| 7 | * |
| 8 | * SPDX-License-Identifier: GPL-2.0 |
| 9 | */ |
| 10 | |
| 11 | #ifndef __SILK_H |
| 12 | #define __SILK_H |
| 13 | |
| 14 | #undef DEBUG |
| 15 | #define CONFIG_R8A7794 |
Nobuhiro Iwamatsu | 7c11273 | 2015-10-10 05:58:28 +0900 | [diff] [blame] | 16 | #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Silk" |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 17 | |
| 18 | #include "rcar-gen2-common.h" |
| 19 | |
Nobuhiro Iwamatsu | 7c11273 | 2015-10-10 05:58:28 +0900 | [diff] [blame] | 20 | #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT) |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 21 | #define CONFIG_SYS_TEXT_BASE 0x70000000 |
| 22 | #else |
| 23 | #define CONFIG_SYS_TEXT_BASE 0xE6304000 |
| 24 | #endif |
| 25 | |
Nobuhiro Iwamatsu | 7c11273 | 2015-10-10 05:58:28 +0900 | [diff] [blame] | 26 | #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT) |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 27 | #define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC |
| 28 | #else |
| 29 | #define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC |
| 30 | #endif |
| 31 | #define STACK_AREA_SIZE 0xC000 |
| 32 | #define LOW_LEVEL_MERAM_STACK \ |
| 33 | (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) |
| 34 | |
| 35 | /* MEMORY */ |
| 36 | #define RCAR_GEN2_SDRAM_BASE 0x40000000 |
| 37 | #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) |
| 38 | #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) |
| 39 | |
| 40 | /* SCIF */ |
| 41 | #define CONFIG_SCIF_CONSOLE |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 42 | |
| 43 | /* FLASH */ |
| 44 | #define CONFIG_SPI |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 45 | #define CONFIG_SH_QSPI |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 46 | #define CONFIG_SPI_FLASH_QUAD |
| 47 | #define CONFIG_SYS_NO_FLASH |
| 48 | |
| 49 | /* SH Ether */ |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 50 | #define CONFIG_SH_ETHER |
| 51 | #define CONFIG_SH_ETHER_USE_PORT 0 |
| 52 | #define CONFIG_SH_ETHER_PHY_ADDR 0x1 |
| 53 | #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII |
| 54 | #define CONFIG_SH_ETHER_CACHE_WRITEBACK |
| 55 | #define CONFIG_SH_ETHER_CACHE_INVALIDATE |
| 56 | #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 |
| 57 | #define CONFIG_PHYLIB |
| 58 | #define CONFIG_PHY_MICREL |
| 59 | #define CONFIG_BITBANGMII |
| 60 | #define CONFIG_BITBANGMII_MULTI |
| 61 | |
| 62 | /* Board Clock */ |
| 63 | #define RMOBILE_XTAL_CLK 20000000u |
| 64 | #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK |
| 65 | #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ |
| 66 | #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) |
| 67 | #define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24) |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 68 | |
| 69 | #define CONFIG_SYS_TMU_CLK_DIV 4 |
| 70 | |
| 71 | /* i2c */ |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 72 | #define CONFIG_SYS_I2C |
| 73 | #define CONFIG_SYS_I2C_SH |
| 74 | #define CONFIG_SYS_I2C_SLAVE 0x7F |
| 75 | #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 |
| 76 | #define CONFIG_SYS_I2C_SH_SPEED0 400000 |
| 77 | #define CONFIG_SYS_I2C_SH_SPEED1 400000 |
| 78 | #define CONFIG_SYS_I2C_SH_SPEED2 400000 |
| 79 | #define CONFIG_SH_I2C_DATA_HIGH 4 |
| 80 | #define CONFIG_SH_I2C_DATA_LOW 5 |
| 81 | #define CONFIG_SH_I2C_CLOCK 10000000 |
| 82 | |
| 83 | #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ |
| 84 | |
| 85 | /* USB */ |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 86 | #define CONFIG_USB_EHCI |
| 87 | #define CONFIG_USB_EHCI_RMOBILE |
| 88 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| 89 | |
| 90 | /* MMCIF */ |
| 91 | #define CONFIG_MMC |
| 92 | #define CONFIG_GENERIC_MMC |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 93 | #define CONFIG_SH_MMCIF |
| 94 | #define CONFIG_SH_MMCIF_ADDR 0xee200000 |
| 95 | #define CONFIG_SH_MMCIF_CLK 48000000 |
| 96 | |
Vladimir Barinov | c595133 | 2015-02-24 18:55:46 +0200 | [diff] [blame] | 97 | /* SDHI */ |
| 98 | #define CONFIG_SH_SDHI_FREQ 97500000 |
| 99 | |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 100 | /* Module stop status bits */ |
| 101 | /* INTC-RT */ |
| 102 | #define CONFIG_SMSTP0_ENA 0x00400000 |
| 103 | /* MSIF */ |
| 104 | #define CONFIG_SMSTP2_ENA 0x00002000 |
| 105 | /* INTC-SYS, IRQC */ |
| 106 | #define CONFIG_SMSTP4_ENA 0x00000180 |
| 107 | /* SCIF2 */ |
| 108 | #define CONFIG_SMSTP7_ENA 0x00080000 |
| 109 | |
| 110 | #endif /* __SILK_H */ |