Phil Edworthy | 04a6275 | 2012-05-15 22:15:51 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Configuation settings for the Renesas RSK2+SH7269 board |
| 3 | * |
| 4 | * Copyright (C) 2012 Renesas Electronics Europe Ltd. |
| 5 | * Copyright (C) 2012 Phil Edworthy |
| 6 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Phil Edworthy | 04a6275 | 2012-05-15 22:15:51 +0000 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __RSK7269_H |
| 11 | #define __RSK7269_H |
| 12 | |
| 13 | #undef DEBUG |
Phil Edworthy | 04a6275 | 2012-05-15 22:15:51 +0000 | [diff] [blame] | 14 | #define CONFIG_CPU_SH7269 1 |
| 15 | #define CONFIG_RSK7269 1 |
| 16 | |
Phil Edworthy | 04a6275 | 2012-05-15 22:15:51 +0000 | [diff] [blame] | 17 | #define CONFIG_BAUDRATE 115200 |
| 18 | #define CONFIG_BOOTARGS "console=ttySC7,115200" |
Phil Edworthy | 04a6275 | 2012-05-15 22:15:51 +0000 | [diff] [blame] | 19 | #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } |
| 20 | |
| 21 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
Phil Edworthy | 04a6275 | 2012-05-15 22:15:51 +0000 | [diff] [blame] | 22 | #define CONFIG_SYS_CBSIZE 256 /* Boot Argument Buffer Size */ |
| 23 | #define CONFIG_SYS_PBSIZE 256 /* Print Buffer Size */ |
| 24 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 25 | |
| 26 | /* Serial */ |
| 27 | #define CONFIG_SCIF_CONSOLE |
| 28 | #define CONFIG_CONS_SCIF7 |
| 29 | |
| 30 | /* Memory */ |
| 31 | /* u-boot relocated to top 256KB of ram */ |
| 32 | #define CONFIG_SYS_TEXT_BASE 0x0DFC0000 |
| 33 | #define CONFIG_SYS_SDRAM_BASE 0x0C000000 |
| 34 | #define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) |
| 35 | |
| 36 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 37 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) |
| 38 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) |
| 39 | #define CONFIG_SYS_MONITOR_LEN (128 * 1024) |
| 40 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024) |
| 41 | |
| 42 | /* NOR Flash */ |
| 43 | #define CONFIG_FLASH_CFI_DRIVER |
| 44 | #define CONFIG_SYS_FLASH_CFI |
| 45 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
| 46 | #define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */ |
| 47 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 48 | #define CONFIG_SYS_MAX_FLASH_SECT 512 |
| 49 | |
| 50 | #define CONFIG_ENV_IS_IN_FLASH 1 |
| 51 | #define CONFIG_ENV_OFFSET (128 * 1024) |
| 52 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) |
| 53 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) |
| 54 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
| 55 | |
| 56 | /* Board Clock */ |
| 57 | #define CONFIG_SYS_CLK_FREQ 66125000 |
Nobuhiro Iwamatsu | e698449 | 2013-08-21 16:11:21 +0900 | [diff] [blame] | 58 | #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ |
| 59 | #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ |
Phil Edworthy | 04a6275 | 2012-05-15 22:15:51 +0000 | [diff] [blame] | 60 | #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ |
Nobuhiro Iwamatsu | befb5cc | 2014-01-08 14:57:30 +0900 | [diff] [blame] | 61 | #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) |
Phil Edworthy | 04a6275 | 2012-05-15 22:15:51 +0000 | [diff] [blame] | 62 | |
| 63 | /* Network interface */ |
| 64 | #define CONFIG_SMC911X |
| 65 | #define CONFIG_SMC911X_16_BIT |
| 66 | #define CONFIG_SMC911X_BASE 0x24000000 |
| 67 | |
| 68 | #endif /* __RSK7269_H */ |