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Daniel Hellstroma2d96db2008-03-26 23:26:48 +01001/* Configuration header file for Gaisler GR-XC3S-1500
2 * spartan board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010011 */
12
13#ifndef __CONFIG_H__
14#define __CONFIG_H__
15
16/*
17 * High Level Configuration Options
18 * (easy to change)
19 */
20
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010021#define CONFIG_GRXC3S1500 1 /* ... on GR-XC3S-1500 board */
22
23/* CPU / AMBA BUS configuration */
Wolfgang Denka1be4762008-05-20 16:00:29 +020024#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010025
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010026/*
27 * Serial console configuration
28 */
29#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020030#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010031
32/* Partitions */
33#define CONFIG_DOS_PARTITION
34#define CONFIG_MAC_PARTITION
35#define CONFIG_ISO_PARTITION
36
37/*
38 * Supported commands
39 */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010040#define CONFIG_CMD_REGINFO
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010041#define CONFIG_CMD_DIAG
42#define CONFIG_CMD_IRQ
43
44/*
45 * Autobooting
46 */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010047
48#define CONFIG_PREBOOT "echo;" \
49 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
50 "echo"
51
52#undef CONFIG_BOOTARGS
53
54#define CONFIG_EXTRA_ENV_SETTINGS \
55 "netdev=eth0\0" \
56 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
57 "nfsroot=${serverip}:${rootpath}\0" \
58 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
59 "addip=setenv bootargs ${bootargs} " \
60 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
61 ":${hostname}:${netdev}:off panic=1\0" \
62 "flash_nfs=run nfsargs addip;" \
63 "bootm ${kernel_addr}\0" \
64 "flash_self=run ramargs addip;" \
65 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
66 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
67 "scratch=40200000\0" \
Mike Frysingerc3c6bf12011-10-12 19:47:51 +000068 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010069 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:grxc3s1500_daniel:eth0\0" \
70 ""
71
72#define CONFIG_NETMASK 255.255.255.0
73#define CONFIG_GATEWAYIP 192.168.0.1
74#define CONFIG_SERVERIP 192.168.0.20
75#define CONFIG_IPADDR 192.168.0.206
Joe Hershberger257ff782011-10-13 13:03:47 +000076#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010077#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergere4da2482011-10-13 13:03:48 +000078#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010079
80#define CONFIG_BOOTCOMMAND "run flash_self"
81
82/* Memory MAP
83 *
84 * Flash:
85 * |--------------------------------|
86 * | 0x00000000 Text & Data & BSS | *
87 * | for Monitor | *
88 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
89 * | UNUSED / Growth | * 256kb
90 * |--------------------------------|
91 * | 0x00050000 Base custom area | *
92 * | kernel / FS | *
93 * | | * Rest of Flash
94 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
95 * | END-0x00008000 Environment | * 32kb
96 * |--------------------------------|
97 *
98 *
99 *
100 * Main Memory:
101 * |--------------------------------|
102 * | UNUSED / scratch area |
103 * | |
104 * | |
105 * | |
106 * | |
107 * |--------------------------------|
108 * | Monitor .Text / .DATA / .BSS | * 256kb
109 * | Relocated! | *
110 * |--------------------------------|
111 * | Monitor Malloc | * 128kb (contains relocated environment)
112 * |--------------------------------|
113 * | Monitor/kernel STACK | * 64kb
114 * |--------------------------------|
115 * | Page Table for MMU systems | * 2k
116 * |--------------------------------|
117 * | PROM Code accessed from Linux | * 6kb-128b
118 * |--------------------------------|
119 * | Global data (avail from kernel)| * 128b
120 * |--------------------------------|
121 *
122 */
123
124/*
125 * Flash configuration (8,16 or 32 MB)
126 * TEXT base always at 0xFFF00000
127 * ENV_ADDR always at 0xFFF40000
128 * FLASH_BASE at 0xFC000000 for 64 MB
129 * 0xFE000000 for 32 MB
130 * 0xFF000000 for 16 MB
131 * 0xFF800000 for 8 MB
132 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200133/*#define CONFIG_SYS_NO_FLASH 1*/
134#define CONFIG_SYS_FLASH_BASE 0x00000000
135#define CONFIG_SYS_FLASH_SIZE 0x00800000
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100136
137#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200138#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
139#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100140
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200141#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
142#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
143#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
144#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
145#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100146
147/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200148#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200149#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200150#define CONFIG_SYS_FLASH_CFI
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100151/* Bypass cache when reading regs from flash memory */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200152#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100153/* Buffered writes (32byte/go) instead of single accesses */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200154#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100155
156/*
157 * Environment settings
158 */
Jean-Christophe PLAGNIOL-VILLARD68a87562008-09-10 22:48:00 +0200159/*#define CONFIG_ENV_IS_NOWHERE 1*/
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200160#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200161/* CONFIG_ENV_ADDR need to be at sector boundary */
162#define CONFIG_ENV_SIZE 0x8000
163#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200164#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100165#define CONFIG_ENV_OVERWRITE 1
166
167/*
168 * Memory map
169 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200170#define CONFIG_SYS_SDRAM_BASE 0x40000000
171#define CONFIG_SYS_SDRAM_SIZE 0x4000000
172#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100173
174/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200175#undef CONFIG_SYS_SRAM_BASE
176#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100177
178/* Always Run U-Boot from SDRAM */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200179#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
180#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
181#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100182
Wolfgang Denk0191e472010-10-26 14:34:52 +0200183#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100184
Wolfgang Denk0191e472010-10-26 14:34:52 +0200185#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200186#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100187
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200188#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
189#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100190
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200191#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200192#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
193# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100194#endif
195
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200196#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
197#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
198#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100199
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200200#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
201#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100202
203/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200204#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
205#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100206
207/* make un relocated address from relocated address */
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200208#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100209
210/*
211 * Ethernet configuration
212 */
213#define CONFIG_GRETH 1
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100214
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100215#define CONFIG_PHY_ADDR 0x00
216
217/*
218 * Miscellaneous configurable options
219 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200220#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100221#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200222#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100223#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200224#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100225#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200226#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
227#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
228#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100229
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200230#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
231#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100232
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200233#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100234
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100235/*
236 * Various low-level settings
237 */
238
239/*-----------------------------------------------------------------------
240 * USB stuff
241 *-----------------------------------------------------------------------
242 */
243#define CONFIG_USB_CLOCK 0x0001BBBB
244#define CONFIG_USB_CONFIG 0x00005000
245
246/***** Gaisler GRLIB IP-Cores Config ********/
247
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200248#define CONFIG_SYS_GRLIB_SDRAM 0
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100249
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100250/* No SDRAM Configuration */
251#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
252
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100253/* See, GRLIB Docs (grip.pdf) on how to set up
254 * These the memory controller registers.
255 */
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100256#define CONFIG_SYS_GRLIB_ESA_MCTRL1
257#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x000000ff | (1<<11))
258#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
259#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00136000
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100260
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100261/* GRLIB FT-MCTRL configuration */
262#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
263#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x000000ff | (1<<11))
264#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
265#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00136000
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100266
267/* no DDR controller */
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100268#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100269
270/* no DDR2 Controller */
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100271#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100272
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100273/* default kernel command line */
274#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
275
276#endif /* __CONFIG_H */