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Phil Sutterd76eba62015-12-25 14:41:25 +01001/*
2 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef _CONFIG_SYNOLOGY_DS414_H
8#define _CONFIG_SYNOLOGY_DS414_H
9
10/*
11 * High Level Configuration Options (easy to change)
12 */
13#define CONFIG_DISPLAY_BOARDINFO_LATE
14
15/*
16 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
17 * for DDR ECC byte filling in the SPL before loading the main
18 * U-Boot into it.
19 */
20#define CONFIG_SYS_TEXT_BASE 0x00800000
21#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
22
23/*
24 * Commands configuration
25 */
26#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
Phil Sutterd76eba62015-12-25 14:41:25 +010027#define CONFIG_CMD_ENV
Phil Sutterd76eba62015-12-25 14:41:25 +010028
29/* I2C */
30#define CONFIG_SYS_I2C
31#define CONFIG_SYS_I2C_MVTWSI
32#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
33#define CONFIG_SYS_I2C_SLAVE 0x0
34#define CONFIG_SYS_I2C_SPEED 100000
35
36/* SPI NOR flash default params, used by sf commands */
37#define CONFIG_SF_DEFAULT_SPEED 1000000
38#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
39
40/* Environment in SPI NOR flash */
41#define CONFIG_ENV_IS_IN_SPI_FLASH
42#define CONFIG_ENV_OFFSET 0x7E0000 /* RedBoot config partition in DTS */
43#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
44#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
45
46#define CONFIG_PHY_MARVELL /* there is a marvell phy */
47#define CONFIG_PHY_ADDR { 0x1, 0x0 }
48#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII
49
50#define CONFIG_SYS_ALT_MEMTEST
51
52/* PCIe support */
53#ifndef CONFIG_SPL_BUILD
Phil Sutterd76eba62015-12-25 14:41:25 +010054#define CONFIG_CMD_PCI
55#define CONFIG_CMD_PCI_ENUM
56#define CONFIG_PCI_MVEBU
57#define CONFIG_PCI_SCAN_SHOW
58#endif
59
60/* USB/EHCI/XHCI configuration */
61
62#define CONFIG_DM_USB
63#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
64
65/* FIXME: broken XHCI support
66 * Below defines should enable support for the two rear USB3 ports. Sadly, this
67 * does not work because:
68 * - xhci-pci seems to not support DM_USB, so with that enabled it is not
69 * found.
70 * - USB init fails, controller does not respond in time */
71#if 0
72#undef CONFIG_DM_USB
Phil Sutterd76eba62015-12-25 14:41:25 +010073#define CONFIG_USB_XHCI_PCI
74#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
75#endif
76
Masahiro Yamada58d00232016-06-04 07:35:03 +090077#if !defined(CONFIG_USB_XHCI_HCD)
Phil Sutterd76eba62015-12-25 14:41:25 +010078#define CONFIG_USB_EHCI
79#define CONFIG_USB_EHCI_MARVELL
80#define CONFIG_EHCI_IS_TDI
81#endif
82
83/* why is this only defined in mv-common.h if CONFIG_DM is undefined? */
Phil Sutterd76eba62015-12-25 14:41:25 +010084#define CONFIG_DOS_PARTITION
85#define CONFIG_ISO_PARTITION
86#define CONFIG_SUPPORT_VFAT
87#define CONFIG_SYS_MVFS
88
89/*
90 * mv-common.h should be defined after CMD configs since it used them
91 * to enable certain macros
92 */
93#include "mv-common.h"
94
95/*
96 * Memory layout while starting into the bin_hdr via the
97 * BootROM:
98 *
99 * 0x4000.4000 - 0x4003.4000 headers space (192KiB)
100 * 0x4000.4030 bin_hdr start address
101 * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB)
102 * 0x4007.fffc BootROM stack top
103 *
104 * The address space between 0x4007.fffc and 0x400f.fff is not locked in
105 * L2 cache thus cannot be used.
106 */
107
108/* SPL */
109/* Defines for SPL */
110#define CONFIG_SPL_FRAMEWORK
111#define CONFIG_SPL_TEXT_BASE 0x40004030
112#define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030)
113
114#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
115#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
116
117#ifdef CONFIG_SPL_BUILD
118#define CONFIG_SYS_MALLOC_SIMPLE
119#endif
120
121#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
122#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
123
Phil Sutterd76eba62015-12-25 14:41:25 +0100124/* SPL related SPI defines */
Phil Sutterd76eba62015-12-25 14:41:25 +0100125#define CONFIG_SPL_SPI_LOAD
Phil Sutterd76eba62015-12-25 14:41:25 +0100126#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
127
128/* DS414 bus width is 32bits */
129#define CONFIG_DDR_32BIT
130
131/* Use random ethernet address if not configured */
132#define CONFIG_LIB_RAND
133#define CONFIG_NET_RANDOM_ETHADDR
134
135/* Default Environment */
136#define CONFIG_BOOTCOMMAND "sf read ${loadaddr} 0xd0000 0x700000; bootm"
137#define CONFIG_BOOTARGS "console=ttyS0,115200"
138#define CONFIG_LOADADDR 0x80000
139#undef CONFIG_PREBOOT /* override preboot for USB and SPI flash init */
140#define CONFIG_PREBOOT "usb start; sf probe"
141
142#endif /* _CONFIG_SYNOLOGY_DS414_H */