| Jens Scharsig | 5fe7c6b | 2009-07-24 10:09:02 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008-2009 |
| 3 | * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de> |
| 4 | * Jens Scharsig <esw@bus-elektronik.de> |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | U-Boot vcxk video controller driver |
| 26 | ====================================== |
| 27 | |
| 28 | By defining CONFIG_VIDEO_VCXK this driver can be used with VC2K, VC4K and |
| 29 | VC8K devices on following boards: |
| 30 | |
| 31 | board | ARCH | Vendor |
| 32 | ----------------------------------------------------------------------- |
| 33 | EB+CPU5282-T1 | MCF5282 | BuS Elektronik GmbH & Co. KG |
| 34 | EB+MCF-EVB123 | MCF5282 | BuS Elektronik GmbH & Co. KG |
| 35 | EB+CPUx9K2 | AT91RM9200 | BuS Elektronik GmbH & Co. KG |
| 36 | ZLSA | AT91RM9200 | Ruf Telematik AG |
| 37 | |
| 38 | Driver configuration |
| 39 | -------------------- |
| 40 | |
| 41 | The driver needs some defines to describe the target hardware: |
| 42 | |
| 43 | CONFIG_SYS_VCXK_BASE |
| 44 | |
| 45 | base address of VCxK hardware memory |
| 46 | |
| 47 | CONFIG_SYS_VCXK_DEFAULT_LINEALIGN |
| 48 | |
| 49 | defines the physical alignment of a pixel row |
| 50 | |
| 51 | CONFIG_SYS_VCXK_DOUBLEBUFFERED |
| 52 | |
| 53 | some boards that use vcxk prevent read from framebuffer memory. |
| 54 | define this option to enable double buffering (needs 16KiB RAM) |
| 55 | |
| 56 | CONFIG_SYS_VCXK_<xxxx>_PIN |
| 57 | |
| 58 | defines the number of the I/O line PIN in the port |
| 59 | valid values for <xxxx> are: |
| 60 | |
| 61 | ACKNOWLEDGE |
| 62 | describes the acknowledge line from vcxk hardware |
| 63 | |
| 64 | ENABLE |
| 65 | describes the enable line to vcxk hardware |
| 66 | |
| 67 | INVERT |
| 68 | describes the invert line to vcxk hardware |
| 69 | |
| 70 | RESET |
| 71 | describes the reset line to vcxk hardware |
| 72 | |
| 73 | REQUEST |
| 74 | describes the request line to vcxk hardware |
| 75 | |
| 76 | CONFIG_SYS_VCXK_<xxxx>_PORT |
| 77 | |
| 78 | defines the I/O port which is connected with the line |
| 79 | for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN |
| 80 | |
| 81 | CONFIG_SYS_VCXK_<xxxx>_DDR |
| 82 | |
| 83 | defines the register which configures the direction |
| 84 | for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN |