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Parthiban Nallathambi5e9147d2019-04-18 00:04:09 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Board configuration file for Variscite DART-6UL Evaluation Kit
4 * Copyright (C) 2019 Parthiban Nallathambi <parthitce@gmail.com>
5 */
6#ifndef __DART_6UL_H
7#define __DART_6UL_H
8
9#include <linux/sizes.h>
10#include "mx6_common.h"
11
12/* SPL options */
13#include "imx6_spl.h"
14
15/* NAND pin conflicts with usdhc2 */
16#ifdef CONFIG_CMD_NAND
17#define CONFIG_SYS_FSL_USDHC_NUM 1
18#else
19#define CONFIG_SYS_FSL_USDHC_NUM 2
20#endif
21
22#ifdef CONFIG_CMD_NET
23#define CONFIG_FEC_ENET_DEV 0
24
25#if (CONFIG_FEC_ENET_DEV == 0)
26#define IMX_FEC_BASE ENET_BASE_ADDR
27#define CONFIG_FEC_MXC_PHYADDR 0x1
28#define CONFIG_FEC_XCV_TYPE RMII
29#define CONFIG_ETHPRIME "eth0"
30#elif (CONFIG_FEC_ENET_DEV == 1)
31#define IMX_FEC_BASE ENET2_BASE_ADDR
32#define CONFIG_FEC_MXC_PHYADDR 0x3
33#define CONFIG_FEC_XCV_TYPE RMII
34#define CONFIG_ETHPRIME "eth1"
35#endif
36#endif
37
38/* Size of malloc() pool */
39#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
40
41/* Environment settings */
Parthiban Nallathambi5e9147d2019-04-18 00:04:09 +020042
43/* Environment in SD */
44#define CONFIG_SYS_MMC_ENV_DEV 0
45#define CONFIG_SYS_MMC_ENV_PART 0
46#define MMC_ROOTFS_DEV 0
47#define MMC_ROOTFS_PART 2
48
49/* Console configs */
50#define CONFIG_MXC_UART_BASE UART1_BASE
51
52/* MMC Configs */
Parthiban Nallathambi5e9147d2019-04-18 00:04:09 +020053
54#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
55#define CONFIG_SUPPORT_EMMC_BOOT
56
57/* I2C configs */
58#ifdef CONFIG_CMD_I2C
59#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
60#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
61#define CONFIG_SYS_I2C_SPEED 100000
62#endif
63
64/* Miscellaneous configurable options */
65#define CONFIG_SYS_MEMTEST_START 0x80000000
66#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
67
68#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
69#define CONFIG_SYS_HZ 1000
70
71/* Physical Memory Map */
72#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
73#define PHYS_SDRAM_SIZE SZ_512M
74
75#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
76#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
77#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
78
79#define CONFIG_SYS_INIT_SP_OFFSET \
80 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
81#define CONFIG_SYS_INIT_SP_ADDR \
82 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
83
84/* USB Configs */
85#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
86#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
87#define CONFIG_MXC_USB_FLAGS 0
88#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
89
90#define CONFIG_IMX_THERMAL
91
92#define ENV_MMC \
93 "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \
94 "mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \
95 "fitpart=1\0" \
96 "bootdelay=3\0" \
97 "silent=1\0" \
98 "optargs=rw rootwait\0" \
99 "mmcautodetect=yes\0" \
100 "mmcrootfstype=ext4\0" \
101 "mmcfit_name=fitImage\0" \
102 "mmcloadfit=fatload mmc ${mmcdev}:${fitpart} ${fit_addr} " \
103 "${mmcfit_name}\0" \
104 "mmcargs=setenv bootargs " \
105 "root=/dev/mmcblk${mmcdev}p${mmcpart} ${optargs} " \
106 "console=${console} rootfstype=${mmcrootfstype}\0" \
107 "mmc_mmc_fit=run mmcloadfit;run mmcargs addcon; bootm ${fit_addr}\0" \
108
109/* Default environment */
110#define CONFIG_EXTRA_ENV_SETTINGS \
111 "fdt_high=0xffffffff\0" \
112 "console=ttymxc0,115200n8\0" \
113 "addcon=setenv bootargs ${bootargs} console=${console},${baudrate}\0" \
114 "fit_addr=0x82000000\0" \
115 ENV_MMC
116
117#define CONFIG_BOOTCOMMAND "run mmc_mmc_fit"
118
119#define BOOT_TARGET_DEVICES(func) \
120 func(MMC, mmc, 0) \
121 func(MMC, mmc, 1) \
122 func(DHCP, dhcp, na)
123
124#include <config_distro_bootcmd.h>
125#endif /* __DART_6UL_H */