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Niklaus Gigerba4655b2008-02-25 18:46:42 +01001/*
2 *(C) Copyright 2005-2007 Netstal Maschinen AG
3 * Niklaus Giger (Niklaus.Giger@netstal.com)
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/************************************************************************
25 * mcu25.h - configuration for MCU25 board (similar to hcu4.h)
26 ***********************************************************************/
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/*-----------------------------------------------------------------------
32 * High Level Configuration Options
33 *----------------------------------------------------------------------*/
34#define CONFIG_MCU25 1 /* Board is MCU25 */
35#define CONFIG_4xx 1 /* ... PPC4xx family */
36#define CONFIG_405GP 1
37#define CONFIG_4xx 1
Niklaus Gigerdebcb102008-10-01 14:46:13 +020038#define CONFIG_HOSTNAME mcu25
39
Wolfgang Denk291ba1b2010-10-06 09:05:45 +020040#define CONFIG_SYS_TEXT_BASE 0xFFFB0000
41
Niklaus Gigerdebcb102008-10-01 14:46:13 +020042/*
43 * Include common defines/options for all boards produced by Netstal Maschinen
44 */
45#include "netstal-common.h"
Niklaus Gigerba4655b2008-02-25 18:46:42 +010046
47#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
48
49#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
50#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
51
52/*-----------------------------------------------------------------------
53 * Base addresses -- Note these are effective addresses where the
54 * actual resources get mapped (not physical addresses)
55*----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020056#define CONFIG_SYS_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */
57#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
Niklaus Gigerba4655b2008-02-25 18:46:42 +010058
59
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020060#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
61#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */
Wolfgang Denk0708bc62010-10-07 21:51:12 +020062#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Niklaus Gigerba4655b2008-02-25 18:46:42 +010063
64/* ... with on-chip memory here (4KBytes) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020065#define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000
66#define CONFIG_SYS_OCM_DATA_SIZE 0x00001000
Niklaus Gigerba4655b2008-02-25 18:46:42 +010067/* Do not set up locked dcache as init ram. */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020068#undef CONFIG_SYS_INIT_DCACHE_CS
Niklaus Gigerba4655b2008-02-25 18:46:42 +010069
70/* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020071#define CONFIG_SYS_TEMP_STACK_OCM 1
Niklaus Gigerba4655b2008-02-25 18:46:42 +010072
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020073#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* OCM */
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +020074#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE
Wolfgang Denk0191e472010-10-26 14:34:52 +020075#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Michael Zaidmanf969a682010-09-20 08:51:53 +020076#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
Niklaus Gigerba4655b2008-02-25 18:46:42 +010077
78/*-----------------------------------------------------------------------
79 * Serial Port
80 *----------------------------------------------------------------------*/
81/*
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020082 * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
83 * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
84 * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
Niklaus Gigerba4655b2008-02-25 18:46:42 +010085 * The Linux BASE_BAUD define should match this configuration.
86 * baseBaud = cpuClock/(uartDivisor*16)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020087 * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
Niklaus Gigerba4655b2008-02-25 18:46:42 +010088 * set Linux BASE_BAUD to 403200.
89 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020090#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
91#define CONFIG_SYS_BASE_BAUD 691200
Niklaus Gigerba4655b2008-02-25 18:46:42 +010092
Niklaus Gigerba4655b2008-02-25 18:46:42 +010093/* Set console baudrate to 9600 */
94#define CONFIG_BAUDRATE 9600
95
Niklaus Gigerba4655b2008-02-25 18:46:42 +010096/*-----------------------------------------------------------------------
97 * Flash
98 *----------------------------------------------------------------------*/
99
100/* Use common CFI driver */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200101#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200102#define CONFIG_FLASH_CFI_DRIVER
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100103/* board provides its own flash_init code */
104#define CONFIG_FLASH_CFI_LEGACY 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200105#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
106#define CONFIG_SYS_FLASH_LEGACY_512Kx8 1
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100107
108/* print 'E' for empty sector on flinfo */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200109#define CONFIG_SYS_FLASH_EMPTY_INFO
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100110
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200111#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
112#define CONFIG_SYS_MAX_FLASH_SECT 8 /* max number of sectors on one chip */
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100113
114/*-----------------------------------------------------------------------
115 * Environment
116 *----------------------------------------------------------------------*/
117
Jean-Christophe PLAGNIOL-VILLARDfdb79c32008-09-10 22:47:59 +0200118#undef CONFIG_ENV_IS_IN_NVRAM
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200119#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD68a87562008-09-10 22:48:00 +0200120#undef CONFIG_ENV_IS_NOWHERE
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100121
Jean-Christophe PLAGNIOL-VILLARDe46af642008-09-05 09:19:30 +0200122#ifdef CONFIG_ENV_IS_IN_EEPROM
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100123/* Put the environment after the SDRAM configuration */
Wolfgang Denka1be4762008-05-20 16:00:29 +0200124#define PROM_SIZE 2048
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200125#define CONFIG_ENV_OFFSET 512
126#define CONFIG_ENV_SIZE (PROM_SIZE-CONFIG_ENV_OFFSET)
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100127#endif
128
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200129#ifdef CONFIG_ENV_IS_IN_FLASH
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100130/* Put the environment in Flash */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200131#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200132#define CONFIG_ENV_ADDR ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200133#define CONFIG_ENV_SIZE 8*1024 /* 8 KB Environment Sector */
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100134
135/* Address and size of Redundant Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200136#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
137#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100138#endif
139
140/*-----------------------------------------------------------------------
141 * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
142 * the first internal I2C controller of the PPC440EPx
143 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200144#define CONFIG_SYS_SPD_BUS_NUM 0
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100145
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100146/* Setup some board specific values for the default environment variables */
Niklaus Gigerdebcb102008-10-01 14:46:13 +0200147#define CONFIG_IPADDR 172.25.1.25
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100148
Niklaus Gigerdebcb102008-10-01 14:46:13 +0200149#define CONFIG_EXTRA_ENV_SETTINGS \
150 CONFIG_NETSTAL_DEF_ENV \
151 CONFIG_NETSTAL_DEF_ENV_POWERPC \
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100152 ""
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100153
154/*
155 * BOOTP options
156 */
157#define CONFIG_BOOTP_BOOTFILESIZE
158#define CONFIG_BOOTP_BOOTPATH
159#define CONFIG_BOOTP_GATEWAY
160#define CONFIG_BOOTP_HOSTNAME
161
162/*
163 * Command line configuration.
164 */
165#include <config_cmd_default.h>
166
167#define CONFIG_CMD_ASKENV
168#define CONFIG_CMD_CACHE
169#define CONFIG_CMD_DHCP
170#define CONFIG_CMD_DIAG
171#define CONFIG_CMD_EEPROM
172#define CONFIG_CMD_ELF
173#define CONFIG_CMD_FLASH
174#define CONFIG_CMD_I2C
175#define CONFIG_CMD_IMMAP
176#define CONFIG_CMD_IRQ
177#define CONFIG_CMD_MII
178#define CONFIG_CMD_NET
179#define CONFIG_CMD_PING
180#define CONFIG_CMD_REGINFO
181#define CONFIG_CMD_SDRAM
182
183/* SPD EEPROM (sdram speed config) disabled */
184#define CONFIG_SPD_EEPROM 1
185#define SPD_EEPROM_ADDRESS 0x50
186
187/* POST support */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200188#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
189 CONFIG_SYS_POST_CPU | \
190 CONFIG_SYS_POST_UART | \
191 CONFIG_SYS_POST_I2C | \
192 CONFIG_SYS_POST_CACHE | \
193 CONFIG_SYS_POST_ETHER | \
194 CONFIG_SYS_POST_SPR)
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100195
Stefan Roesea0a14792010-09-29 16:58:38 +0200196#define CONFIG_SYS_POST_UART_TABLE { CONFIG_SYS_NS16550_COM1 }
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100197#undef CONFIG_LOGBUFFER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200198#define CONFIG_SYS_POST_CACHE_ADDR 0x00800000 /* free virtual address */
199#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100200
201/*-----------------------------------------------------------------------
202 * Miscellaneous configurable options
203 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200204#define CONFIG_SYS_LONGHELP /* undef to save memory */
205#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100206#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200207 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100208#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200209 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100210#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200211#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
212#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
213#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100214
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200215#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
216#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100217
218
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200219#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100220
221/*-----------------------------------------------------------------------
222 * External Bus Controller (EBC) Setup
223 */
224
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200225#define CONFIG_SYS_EBC_CFG 0x98400000
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100226
227/* Memory Bank 0 (Flash Bank 0) initialization */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200228#define CONFIG_SYS_EBC_PB0AP 0x02005400
229#define CONFIG_SYS_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit*/
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100230
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200231#define CONFIG_SYS_EBC_PB1AP 0x03041200
232#define CONFIG_SYS_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100233
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200234#define CONFIG_SYS_EBC_PB2AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */
235#define CONFIG_SYS_EBC_PB2CR 0x7A09A000u
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100236
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200237#define CONFIG_SYS_EBC_PB3AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */
238#define CONFIG_SYS_EBC_PB3CR 0x7B09A000u
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100239
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200240#define CONFIG_SYS_EBC_PB4AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */
241#define CONFIG_SYS_EBC_PB4CR 0x7C09A000u
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100242
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200243#define CONFIG_SYS_EBC_PB5AP 0x00800200u
244#define CONFIG_SYS_EBC_PB5CR 0x7D81A000u
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100245
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200246#define CONFIG_SYS_EBC_PB6AP 0x01040200u
247#define CONFIG_SYS_EBC_PB6CR 0x7D91A000u
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100248
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200249#define CONFIG_SYS_GPIO0_OR 0x087FFFFF /* GPIO value */
250#define CONFIG_SYS_GPIO0_TCR 0x7FFF8000 /* GPIO value */
251#define CONFIG_SYS_GPIO0_ODR 0xFFFF0000 /* GPIO value */
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100252/*
253 * For booting Linux, the board info and command line data
254 * have to be in the first 8 MB of memory, since this is
255 * the maximum mapped by the Linux kernel during initialization.
256 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200257#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100258
259/* Init Memory Controller:
260 *
261 * BR0/1 and OR0/1 (FLASH)
262 */
263
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200264#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100265#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
266
267
268/* Configuration Port location */
269#define CONFIG_PORT_ADDR 0xF0000500
270
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200271#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
272#ifdef CONFIG_SYS_HUSH_PARSER
273#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100274#endif
275
276#if defined(CONFIG_CMD_KGDB)
277#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
278#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
279#endif
280
Niklaus Gigerba4655b2008-02-25 18:46:42 +0100281#endif /* __CONFIG_H */