blob: 4df43d81f827199ca4a39b512d6310581710f90f [file] [log] [blame]
Eugen Hristev0de35aa2020-03-10 11:56:38 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2020 Microchip Technology, Inc.
4 * Eugen Hristev <eugen.hristev@microchip.com>
5 */
6
7#include <common.h>
8#include <debug_uart.h>
9#include <init.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060010#include <asm/global_data.h>
Eugen Hristev0de35aa2020-03-10 11:56:38 +020011#include <asm/io.h>
12#include <asm/arch/at91_common.h>
13#include <asm/arch/atmel_pio4.h>
14#include <asm/arch/clk.h>
15#include <asm/arch/gpio.h>
16#include <asm/arch/sama7g5.h>
17
18DECLARE_GLOBAL_DATA_PTR;
19
20int board_late_init(void)
21{
22 return 0;
23}
24
25#if (IS_ENABLED(CONFIG_DEBUG_UART_BOARD_INIT))
26static void board_uart0_hw_init(void)
27{
28 /* FLEXCOM3 IO0 */
29 atmel_pio4_set_f_periph(AT91_PIO_PORTD, 17, ATMEL_PIO_PUEN_MASK);
30 /* FLEXCOM3 IO1 */
31 atmel_pio4_set_f_periph(AT91_PIO_PORTD, 16, 0);
32
33 at91_periph_clk_enable(ATMEL_ID_FLEXCOM3);
34}
35
36void board_debug_uart_init(void)
37{
38 board_uart0_hw_init();
39}
40#endif
41
42int board_early_init_f(void)
43{
44#if (IS_ENABLED(CONFIG_DEBUG_UART))
45 debug_uart_init();
46#endif
47 return 0;
48}
49
Eugen Hristevb9a9f4a2020-07-31 15:20:56 +030050#define MAC24AA_MAC_OFFSET 0xfa
51
52#if (IS_ENABLED(CONFIG_MISC_INIT_R))
53int misc_init_r(void)
54{
55#if (IS_ENABLED(CONFIG_I2C_EEPROM))
56 at91_set_ethaddr(MAC24AA_MAC_OFFSET);
57 at91_set_eth1addr(MAC24AA_MAC_OFFSET);
58#endif
59 return 0;
60}
61#endif
62
Eugen Hristev0de35aa2020-03-10 11:56:38 +020063int board_init(void)
64{
65 /* address of boot parameters */
66 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
67
68 return 0;
69}
70
71int dram_init(void)
72{
73 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
74 CONFIG_SYS_SDRAM_SIZE);
75 return 0;
76}
77