Simon Glass | 40ffb68 | 2015-01-27 22:13:31 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015, Google, Inc |
| 3 | * Written by Simon Glass <sjg@chromium.org> |
| 4 | * All rights reserved. |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0 |
| 7 | */ |
| 8 | |
| 9 | #include <common.h> |
Stefan Roese | b0ff2c1 | 2016-07-18 12:51:39 +0200 | [diff] [blame] | 10 | #include <dm.h> |
Simon Glass | 40ffb68 | 2015-01-27 22:13:31 -0700 | [diff] [blame] | 11 | #include <errno.h> |
| 12 | #include <pci.h> |
| 13 | #include <usb.h> |
| 14 | |
| 15 | #include "xhci.h" |
| 16 | |
Stefan Roese | b0ff2c1 | 2016-07-18 12:51:39 +0200 | [diff] [blame] | 17 | #ifndef CONFIG_DM_USB |
| 18 | |
Simon Glass | 40ffb68 | 2015-01-27 22:13:31 -0700 | [diff] [blame] | 19 | /* |
| 20 | * Create the appropriate control structures to manage a new XHCI host |
| 21 | * controller. |
| 22 | */ |
| 23 | int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr, |
| 24 | struct xhci_hcor **ret_hcor) |
| 25 | { |
| 26 | struct xhci_hccr *hccr; |
| 27 | struct xhci_hcor *hcor; |
| 28 | pci_dev_t pdev; |
| 29 | uint32_t cmd; |
| 30 | int len; |
| 31 | |
| 32 | pdev = pci_find_class(PCI_CLASS_SERIAL_USB_XHCI, index); |
| 33 | if (pdev < 0) { |
| 34 | printf("XHCI host controller not found\n"); |
| 35 | return -1; |
| 36 | } |
| 37 | |
| 38 | hccr = (struct xhci_hccr *)pci_map_bar(pdev, |
| 39 | PCI_BASE_ADDRESS_0, PCI_REGION_MEM); |
| 40 | len = HC_LENGTH(xhci_readl(&hccr->cr_capbase)); |
| 41 | hcor = (struct xhci_hcor *)((uint32_t)hccr + len); |
| 42 | |
| 43 | debug("XHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n", |
| 44 | (uint32_t)hccr, (uint32_t)hcor, len); |
| 45 | |
| 46 | *ret_hccr = hccr; |
| 47 | *ret_hcor = hcor; |
| 48 | |
| 49 | /* enable busmaster */ |
| 50 | pci_read_config_dword(pdev, PCI_COMMAND, &cmd); |
| 51 | cmd |= PCI_COMMAND_MASTER; |
| 52 | pci_write_config_dword(pdev, PCI_COMMAND, cmd); |
| 53 | |
| 54 | return 0; |
| 55 | } |
| 56 | |
| 57 | /* |
| 58 | * Destroy the appropriate control structures corresponding * to the XHCI host |
| 59 | * controller |
| 60 | */ |
| 61 | void xhci_hcd_stop(int index) |
| 62 | { |
Stefan Roese | b0ff2c1 | 2016-07-18 12:51:39 +0200 | [diff] [blame] | 63 | } |
| 64 | |
| 65 | #else |
| 66 | |
| 67 | struct xhci_pci_priv { |
| 68 | struct xhci_ctrl ctrl; /* Needs to come first in this struct! */ |
| 69 | }; |
| 70 | |
| 71 | static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr, |
| 72 | struct xhci_hcor **ret_hcor) |
| 73 | { |
| 74 | struct xhci_hccr *hccr; |
| 75 | struct xhci_hcor *hcor; |
| 76 | u32 cmd; |
| 77 | |
| 78 | hccr = (struct xhci_hccr *)dm_pci_map_bar(dev, |
| 79 | PCI_BASE_ADDRESS_0, PCI_REGION_MEM); |
| 80 | hcor = (struct xhci_hcor *)((uintptr_t) hccr + |
| 81 | HC_LENGTH(xhci_readl(&hccr->cr_capbase))); |
| 82 | |
| 83 | debug("XHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n", |
| 84 | (u32)hccr, (u32)hcor, |
| 85 | (u32)HC_LENGTH(xhci_readl(&hccr->cr_capbase))); |
| 86 | |
| 87 | *ret_hccr = hccr; |
| 88 | *ret_hcor = hcor; |
| 89 | |
| 90 | /* enable busmaster */ |
| 91 | dm_pci_read_config32(dev, PCI_COMMAND, &cmd); |
| 92 | cmd |= PCI_COMMAND_MASTER; |
| 93 | dm_pci_write_config32(dev, PCI_COMMAND, cmd); |
| 94 | } |
| 95 | |
| 96 | static int xhci_pci_probe(struct udevice *dev) |
| 97 | { |
| 98 | struct xhci_hccr *hccr; |
| 99 | struct xhci_hcor *hcor; |
| 100 | |
| 101 | xhci_pci_init(dev, &hccr, &hcor); |
| 102 | |
| 103 | return xhci_register(dev, hccr, hcor); |
| 104 | } |
| 105 | |
| 106 | static int xhci_pci_remove(struct udevice *dev) |
| 107 | { |
| 108 | int ret; |
| 109 | |
| 110 | ret = xhci_deregister(dev); |
| 111 | if (ret) |
| 112 | return ret; |
| 113 | |
| 114 | return 0; |
Simon Glass | 40ffb68 | 2015-01-27 22:13:31 -0700 | [diff] [blame] | 115 | } |
Stefan Roese | b0ff2c1 | 2016-07-18 12:51:39 +0200 | [diff] [blame] | 116 | |
| 117 | static const struct udevice_id xhci_pci_ids[] = { |
| 118 | { .compatible = "xhci-pci" }, |
| 119 | { } |
| 120 | }; |
| 121 | |
| 122 | U_BOOT_DRIVER(xhci_pci) = { |
| 123 | .name = "xhci_pci", |
| 124 | .id = UCLASS_USB, |
| 125 | .probe = xhci_pci_probe, |
| 126 | .remove = xhci_pci_remove, |
| 127 | .of_match = xhci_pci_ids, |
| 128 | .ops = &xhci_usb_ops, |
| 129 | .platdata_auto_alloc_size = sizeof(struct usb_platdata), |
| 130 | .priv_auto_alloc_size = sizeof(struct xhci_pci_priv), |
| 131 | .flags = DM_FLAG_ALLOC_PRIV_DMA, |
| 132 | }; |
| 133 | |
| 134 | static struct pci_device_id xhci_pci_supported[] = { |
| 135 | { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0) }, |
| 136 | {}, |
| 137 | }; |
| 138 | |
| 139 | U_BOOT_PCI_DEVICE(xhci_pci, xhci_pci_supported); |
| 140 | |
| 141 | #endif /* CONFIG_DM_USB */ |