Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 2 | /* |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 3 | * i2c driver for Freescale i.MX series |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 4 | * |
| 5 | * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 6 | * (c) 2011 Marek Vasut <marek.vasut@gmail.com> |
Biwen Li | 70a8158 | 2020-07-02 11:13:00 +0800 | [diff] [blame] | 7 | * Copyright 2020 NXP |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 8 | * |
| 9 | * Based on i2c-imx.c from linux kernel: |
| 10 | * Copyright (C) 2005 Torsten Koschorrek <koschorrek at synertronixx.de> |
| 11 | * Copyright (C) 2005 Matthias Blaschke <blaschke at synertronixx.de> |
| 12 | * Copyright (C) 2007 RightHand Technologies, Inc. |
| 13 | * Copyright (C) 2008 Darius Augulis <darius.augulis at teltonika.lt> |
| 14 | * |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include <common.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 18 | #include <log.h> |
Liu Hui-R64343 | 447beb1 | 2011-01-03 22:27:39 +0000 | [diff] [blame] | 19 | #include <asm/arch/clock.h> |
Stefano Babic | 78129d9 | 2011-03-14 15:43:56 +0100 | [diff] [blame] | 20 | #include <asm/arch/imx-regs.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 21 | #include <asm/global_data.h> |
Simon Glass | 9bc1564 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 22 | #include <dm/device_compat.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 23 | #include <linux/delay.h> |
Masahiro Yamada | 56a931c | 2016-09-21 11:28:55 +0900 | [diff] [blame] | 24 | #include <linux/errno.h> |
Stefano Babic | 33731bc | 2017-06-29 10:16:06 +0200 | [diff] [blame] | 25 | #include <asm/mach-imx/mxc_i2c.h> |
Peng Fan | 23d4ee3 | 2020-05-01 22:08:35 +0800 | [diff] [blame] | 26 | #include <asm/mach-imx/sys_proto.h> |
Troy Kisky | 2254b7f | 2012-07-19 08:18:03 +0000 | [diff] [blame] | 27 | #include <asm/io.h> |
Marek Vasut | 5f1291e | 2011-10-26 00:05:44 +0000 | [diff] [blame] | 28 | #include <i2c.h> |
Troy Kisky | f024a3b | 2012-07-19 08:18:09 +0000 | [diff] [blame] | 29 | #include <watchdog.h> |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 30 | #include <dm.h> |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 31 | #include <dm/pinctrl.h> |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 32 | #include <fdtdec.h> |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 33 | |
York Sun | a4c0266 | 2014-02-10 14:02:52 -0800 | [diff] [blame] | 34 | DECLARE_GLOBAL_DATA_PTR; |
| 35 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 36 | #define I2C_QUIRK_FLAG (1 << 0) |
| 37 | |
| 38 | #define IMX_I2C_REGSHIFT 2 |
| 39 | #define VF610_I2C_REGSHIFT 0 |
Yuan Yao | d40c885 | 2016-06-08 18:24:51 +0800 | [diff] [blame] | 40 | |
| 41 | #define I2C_EARLY_INIT_INDEX 0 |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 42 | #ifdef CFG_SYS_I2C_IFDR_DIV |
| 43 | #define I2C_IFDR_DIV_CONSERVATIVE CFG_SYS_I2C_IFDR_DIV |
Yuan Yao | d40c885 | 2016-06-08 18:24:51 +0800 | [diff] [blame] | 44 | #else |
| 45 | #define I2C_IFDR_DIV_CONSERVATIVE 0x7e |
| 46 | #endif |
| 47 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 48 | /* Register index */ |
| 49 | #define IADR 0 |
| 50 | #define IFDR 1 |
| 51 | #define I2CR 2 |
| 52 | #define I2SR 3 |
| 53 | #define I2DR 4 |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 54 | |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 55 | #define I2CR_IIEN (1 << 6) |
| 56 | #define I2CR_MSTA (1 << 5) |
| 57 | #define I2CR_MTX (1 << 4) |
| 58 | #define I2CR_TX_NO_AK (1 << 3) |
| 59 | #define I2CR_RSTA (1 << 2) |
| 60 | |
| 61 | #define I2SR_ICF (1 << 7) |
| 62 | #define I2SR_IBB (1 << 5) |
Troy Kisky | 8ff683a | 2012-07-19 08:18:15 +0000 | [diff] [blame] | 63 | #define I2SR_IAL (1 << 4) |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 64 | #define I2SR_IIF (1 << 1) |
| 65 | #define I2SR_RX_NO_AK (1 << 0) |
| 66 | |
Alison Wang | cf50800 | 2013-06-17 15:30:39 +0800 | [diff] [blame] | 67 | #ifdef I2C_QUIRK_REG |
| 68 | #define I2CR_IEN (0 << 7) |
| 69 | #define I2CR_IDIS (1 << 7) |
| 70 | #define I2SR_IIF_CLEAR (1 << 1) |
| 71 | #else |
| 72 | #define I2CR_IEN (1 << 7) |
| 73 | #define I2CR_IDIS (0 << 7) |
| 74 | #define I2SR_IIF_CLEAR (0 << 1) |
| 75 | #endif |
| 76 | |
Alison Wang | cf50800 | 2013-06-17 15:30:39 +0800 | [diff] [blame] | 77 | #ifdef I2C_QUIRK_REG |
| 78 | static u16 i2c_clk_div[60][2] = { |
| 79 | { 20, 0x00 }, { 22, 0x01 }, { 24, 0x02 }, { 26, 0x03 }, |
| 80 | { 28, 0x04 }, { 30, 0x05 }, { 32, 0x09 }, { 34, 0x06 }, |
| 81 | { 36, 0x0A }, { 40, 0x07 }, { 44, 0x0C }, { 48, 0x0D }, |
| 82 | { 52, 0x43 }, { 56, 0x0E }, { 60, 0x45 }, { 64, 0x12 }, |
| 83 | { 68, 0x0F }, { 72, 0x13 }, { 80, 0x14 }, { 88, 0x15 }, |
| 84 | { 96, 0x19 }, { 104, 0x16 }, { 112, 0x1A }, { 128, 0x17 }, |
| 85 | { 136, 0x4F }, { 144, 0x1C }, { 160, 0x1D }, { 176, 0x55 }, |
| 86 | { 192, 0x1E }, { 208, 0x56 }, { 224, 0x22 }, { 228, 0x24 }, |
| 87 | { 240, 0x1F }, { 256, 0x23 }, { 288, 0x5C }, { 320, 0x25 }, |
| 88 | { 384, 0x26 }, { 448, 0x2A }, { 480, 0x27 }, { 512, 0x2B }, |
| 89 | { 576, 0x2C }, { 640, 0x2D }, { 768, 0x31 }, { 896, 0x32 }, |
| 90 | { 960, 0x2F }, { 1024, 0x33 }, { 1152, 0x34 }, { 1280, 0x35 }, |
| 91 | { 1536, 0x36 }, { 1792, 0x3A }, { 1920, 0x37 }, { 2048, 0x3B }, |
| 92 | { 2304, 0x3C }, { 2560, 0x3D }, { 3072, 0x3E }, { 3584, 0x7A }, |
| 93 | { 3840, 0x3F }, { 4096, 0x7B }, { 5120, 0x7D }, { 6144, 0x7E }, |
| 94 | }; |
| 95 | #else |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 96 | static u16 i2c_clk_div[50][2] = { |
| 97 | { 22, 0x20 }, { 24, 0x21 }, { 26, 0x22 }, { 28, 0x23 }, |
| 98 | { 30, 0x00 }, { 32, 0x24 }, { 36, 0x25 }, { 40, 0x26 }, |
| 99 | { 42, 0x03 }, { 44, 0x27 }, { 48, 0x28 }, { 52, 0x05 }, |
| 100 | { 56, 0x29 }, { 60, 0x06 }, { 64, 0x2A }, { 72, 0x2B }, |
| 101 | { 80, 0x2C }, { 88, 0x09 }, { 96, 0x2D }, { 104, 0x0A }, |
| 102 | { 112, 0x2E }, { 128, 0x2F }, { 144, 0x0C }, { 160, 0x30 }, |
| 103 | { 192, 0x31 }, { 224, 0x32 }, { 240, 0x0F }, { 256, 0x33 }, |
| 104 | { 288, 0x10 }, { 320, 0x34 }, { 384, 0x35 }, { 448, 0x36 }, |
| 105 | { 480, 0x13 }, { 512, 0x37 }, { 576, 0x14 }, { 640, 0x38 }, |
| 106 | { 768, 0x39 }, { 896, 0x3A }, { 960, 0x17 }, { 1024, 0x3B }, |
| 107 | { 1152, 0x18 }, { 1280, 0x3C }, { 1536, 0x3D }, { 1792, 0x3E }, |
| 108 | { 1920, 0x1B }, { 2048, 0x3F }, { 2304, 0x1C }, { 2560, 0x1D }, |
| 109 | { 3072, 0x1E }, { 3840, 0x1F } |
| 110 | }; |
Alison Wang | cf50800 | 2013-06-17 15:30:39 +0800 | [diff] [blame] | 111 | #endif |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 112 | |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 113 | /* |
| 114 | * Calculate and set proper clock divider |
| 115 | */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 116 | static uint8_t i2c_imx_get_clk(struct mxc_i2c_bus *i2c_bus, unsigned int rate) |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 117 | { |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 118 | unsigned int i2c_clk_rate; |
| 119 | unsigned int div; |
Marek Vasut | 5f1291e | 2011-10-26 00:05:44 +0000 | [diff] [blame] | 120 | u8 clk_div; |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 121 | |
Liu Hui-R64343 | 447beb1 | 2011-01-03 22:27:39 +0000 | [diff] [blame] | 122 | #if defined(CONFIG_MX31) |
Stefano Babic | 2212172 | 2011-01-20 07:50:44 +0000 | [diff] [blame] | 123 | struct clock_control_regs *sc_regs = |
| 124 | (struct clock_control_regs *)CCM_BASE; |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 125 | |
Guennadi Liakhovetski | 3314fc6 | 2009-02-13 09:23:36 +0100 | [diff] [blame] | 126 | /* start the required I2C clock */ |
Troy Kisky | 8462c63 | 2012-04-24 17:33:25 +0000 | [diff] [blame] | 127 | writel(readl(&sc_regs->cgr0) | (3 << CONFIG_SYS_I2C_CLK_OFFSET), |
Stefano Babic | 2212172 | 2011-01-20 07:50:44 +0000 | [diff] [blame] | 128 | &sc_regs->cgr0); |
Liu Hui-R64343 | 447beb1 | 2011-01-03 22:27:39 +0000 | [diff] [blame] | 129 | #endif |
Guennadi Liakhovetski | 3314fc6 | 2009-02-13 09:23:36 +0100 | [diff] [blame] | 130 | |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 131 | /* Divider value calculation */ |
Peng Fan | 87ea562 | 2019-08-08 01:43:30 +0000 | [diff] [blame] | 132 | #if CONFIG_IS_ENABLED(CLK) |
| 133 | i2c_clk_rate = clk_get_rate(&i2c_bus->per_clk); |
| 134 | #else |
Matthias Weisser | 99ba342 | 2012-09-24 02:46:53 +0000 | [diff] [blame] | 135 | i2c_clk_rate = mxc_get_clock(MXC_I2C_CLK); |
Peng Fan | 87ea562 | 2019-08-08 01:43:30 +0000 | [diff] [blame] | 136 | #endif |
| 137 | |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 138 | div = (i2c_clk_rate + rate - 1) / rate; |
| 139 | if (div < i2c_clk_div[0][0]) |
Marek Vasut | 4f27444 | 2011-09-27 06:34:11 +0000 | [diff] [blame] | 140 | clk_div = 0; |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 141 | else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1][0]) |
Marek Vasut | 4f27444 | 2011-09-27 06:34:11 +0000 | [diff] [blame] | 142 | clk_div = ARRAY_SIZE(i2c_clk_div) - 1; |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 143 | else |
Marek Vasut | 4f27444 | 2011-09-27 06:34:11 +0000 | [diff] [blame] | 144 | for (clk_div = 0; i2c_clk_div[clk_div][0] < div; clk_div++) |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 145 | ; |
| 146 | |
| 147 | /* Store divider value */ |
Marek Vasut | 5f1291e | 2011-10-26 00:05:44 +0000 | [diff] [blame] | 148 | return clk_div; |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 149 | } |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 150 | |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 151 | /* |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 152 | * Set I2C Bus speed |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 153 | */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 154 | static int bus_i2c_set_bus_speed(struct mxc_i2c_bus *i2c_bus, int speed) |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 155 | { |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 156 | ulong base = i2c_bus->base; |
| 157 | bool quirk = i2c_bus->driver_data & I2C_QUIRK_FLAG ? true : false; |
| 158 | u8 clk_idx = i2c_imx_get_clk(i2c_bus, speed); |
Marek Vasut | 5f1291e | 2011-10-26 00:05:44 +0000 | [diff] [blame] | 159 | u8 idx = i2c_clk_div[clk_idx][1]; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 160 | int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; |
Marek Vasut | 5f1291e | 2011-10-26 00:05:44 +0000 | [diff] [blame] | 161 | |
Heiko Schocher | 24ebcf2 | 2015-05-18 10:58:12 +0200 | [diff] [blame] | 162 | if (!base) |
Simon Glass | f44b4bf | 2017-09-17 16:54:53 -0600 | [diff] [blame] | 163 | return -EINVAL; |
Heiko Schocher | 24ebcf2 | 2015-05-18 10:58:12 +0200 | [diff] [blame] | 164 | |
Marek Vasut | 5f1291e | 2011-10-26 00:05:44 +0000 | [diff] [blame] | 165 | /* Store divider value */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 166 | writeb(idx, base + (IFDR << reg_shift)); |
Marek Vasut | 5f1291e | 2011-10-26 00:05:44 +0000 | [diff] [blame] | 167 | |
Troy Kisky | e6fa4d7 | 2012-07-19 08:18:12 +0000 | [diff] [blame] | 168 | /* Reset module */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 169 | writeb(I2CR_IDIS, base + (I2CR << reg_shift)); |
| 170 | writeb(0, base + (I2SR << reg_shift)); |
Marek Vasut | 4f27444 | 2011-09-27 06:34:11 +0000 | [diff] [blame] | 171 | return 0; |
| 172 | } |
| 173 | |
Troy Kisky | f024a3b | 2012-07-19 08:18:09 +0000 | [diff] [blame] | 174 | #define ST_BUS_IDLE (0 | (I2SR_IBB << 8)) |
| 175 | #define ST_BUS_BUSY (I2SR_IBB | (I2SR_IBB << 8)) |
| 176 | #define ST_IIF (I2SR_IIF | (I2SR_IIF << 8)) |
Stefano Babic | 848bb99 | 2011-01-20 07:51:31 +0000 | [diff] [blame] | 177 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 178 | static int wait_for_sr_state(struct mxc_i2c_bus *i2c_bus, unsigned state) |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 179 | { |
Troy Kisky | f024a3b | 2012-07-19 08:18:09 +0000 | [diff] [blame] | 180 | unsigned sr; |
| 181 | ulong elapsed; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 182 | bool quirk = i2c_bus->driver_data & I2C_QUIRK_FLAG ? true : false; |
| 183 | int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; |
| 184 | ulong base = i2c_bus->base; |
Troy Kisky | f024a3b | 2012-07-19 08:18:09 +0000 | [diff] [blame] | 185 | ulong start_time = get_timer(0); |
| 186 | for (;;) { |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 187 | sr = readb(base + (I2SR << reg_shift)); |
Troy Kisky | 8ff683a | 2012-07-19 08:18:15 +0000 | [diff] [blame] | 188 | if (sr & I2SR_IAL) { |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 189 | if (quirk) |
| 190 | writeb(sr | I2SR_IAL, base + |
| 191 | (I2SR << reg_shift)); |
| 192 | else |
| 193 | writeb(sr & ~I2SR_IAL, base + |
| 194 | (I2SR << reg_shift)); |
Troy Kisky | 8ff683a | 2012-07-19 08:18:15 +0000 | [diff] [blame] | 195 | printf("%s: Arbitration lost sr=%x cr=%x state=%x\n", |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 196 | __func__, sr, readb(base + (I2CR << reg_shift)), |
| 197 | state); |
Troy Kisky | 8ff683a | 2012-07-19 08:18:15 +0000 | [diff] [blame] | 198 | return -ERESTART; |
| 199 | } |
Troy Kisky | f024a3b | 2012-07-19 08:18:09 +0000 | [diff] [blame] | 200 | if ((sr & (state >> 8)) == (unsigned char)state) |
| 201 | return sr; |
Stefan Roese | 80877fa | 2022-09-02 14:10:46 +0200 | [diff] [blame] | 202 | schedule(); |
Troy Kisky | f024a3b | 2012-07-19 08:18:09 +0000 | [diff] [blame] | 203 | elapsed = get_timer(start_time); |
| 204 | if (elapsed > (CONFIG_SYS_HZ / 10)) /* .1 seconds */ |
| 205 | break; |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 206 | } |
Troy Kisky | f024a3b | 2012-07-19 08:18:09 +0000 | [diff] [blame] | 207 | printf("%s: failed sr=%x cr=%x state=%x\n", __func__, |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 208 | sr, readb(base + (I2CR << reg_shift)), state); |
Troy Kisky | 752ac8f | 2012-07-19 08:18:04 +0000 | [diff] [blame] | 209 | return -ETIMEDOUT; |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 210 | } |
| 211 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 212 | static int tx_byte(struct mxc_i2c_bus *i2c_bus, u8 byte) |
Stefano Babic | 848bb99 | 2011-01-20 07:51:31 +0000 | [diff] [blame] | 213 | { |
Troy Kisky | 752ac8f | 2012-07-19 08:18:04 +0000 | [diff] [blame] | 214 | int ret; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 215 | int reg_shift = i2c_bus->driver_data & I2C_QUIRK_FLAG ? |
| 216 | VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; |
| 217 | ulong base = i2c_bus->base; |
Stefano Babic | 848bb99 | 2011-01-20 07:51:31 +0000 | [diff] [blame] | 218 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 219 | writeb(I2SR_IIF_CLEAR, base + (I2SR << reg_shift)); |
| 220 | writeb(byte, base + (I2DR << reg_shift)); |
| 221 | |
| 222 | ret = wait_for_sr_state(i2c_bus, ST_IIF); |
Troy Kisky | 752ac8f | 2012-07-19 08:18:04 +0000 | [diff] [blame] | 223 | if (ret < 0) |
| 224 | return ret; |
Troy Kisky | 752ac8f | 2012-07-19 08:18:04 +0000 | [diff] [blame] | 225 | if (ret & I2SR_RX_NO_AK) |
Simon Glass | f44b4bf | 2017-09-17 16:54:53 -0600 | [diff] [blame] | 226 | return -EREMOTEIO; |
Troy Kisky | 752ac8f | 2012-07-19 08:18:04 +0000 | [diff] [blame] | 227 | return 0; |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 228 | } |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 229 | |
| 230 | /* |
| 231 | * Stub implementations for outer i2c slave operations. |
| 232 | */ |
| 233 | void __i2c_force_reset_slave(void) |
| 234 | { |
| 235 | } |
| 236 | void i2c_force_reset_slave(void) |
| 237 | __attribute__((weak, alias("__i2c_force_reset_slave"))); |
Stefano Babic | 848bb99 | 2011-01-20 07:51:31 +0000 | [diff] [blame] | 238 | |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 239 | /* |
Troy Kisky | fef163f | 2012-07-19 08:18:13 +0000 | [diff] [blame] | 240 | * Stop I2C transaction |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 241 | */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 242 | static void i2c_imx_stop(struct mxc_i2c_bus *i2c_bus) |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 243 | { |
Troy Kisky | f024a3b | 2012-07-19 08:18:09 +0000 | [diff] [blame] | 244 | int ret; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 245 | int reg_shift = i2c_bus->driver_data & I2C_QUIRK_FLAG ? |
| 246 | VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; |
| 247 | ulong base = i2c_bus->base; |
| 248 | unsigned int temp = readb(base + (I2CR << reg_shift)); |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 249 | |
Troy Kisky | 1ac1e45 | 2012-07-19 08:18:02 +0000 | [diff] [blame] | 250 | temp &= ~(I2CR_MSTA | I2CR_MTX); |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 251 | writeb(temp, base + (I2CR << reg_shift)); |
| 252 | ret = wait_for_sr_state(i2c_bus, ST_BUS_IDLE); |
Troy Kisky | f024a3b | 2012-07-19 08:18:09 +0000 | [diff] [blame] | 253 | if (ret < 0) |
| 254 | printf("%s:trigger stop failed\n", __func__); |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 255 | } |
| 256 | |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 257 | /* |
Troy Kisky | 14db6f2 | 2012-07-19 08:18:06 +0000 | [diff] [blame] | 258 | * Send start signal, chip address and |
| 259 | * write register address |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 260 | */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 261 | static int i2c_init_transfer_(struct mxc_i2c_bus *i2c_bus, u8 chip, |
| 262 | u32 addr, int alen) |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 263 | { |
Troy Kisky | a974bcc | 2012-07-19 08:18:11 +0000 | [diff] [blame] | 264 | unsigned int temp; |
| 265 | int ret; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 266 | bool quirk = i2c_bus->driver_data & I2C_QUIRK_FLAG ? true : false; |
| 267 | ulong base = i2c_bus->base; |
| 268 | int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; |
| 269 | |
| 270 | /* Reset i2c slave */ |
| 271 | i2c_force_reset_slave(); |
Troy Kisky | a974bcc | 2012-07-19 08:18:11 +0000 | [diff] [blame] | 272 | |
| 273 | /* Enable I2C controller */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 274 | if (quirk) |
| 275 | ret = readb(base + (I2CR << reg_shift)) & I2CR_IDIS; |
| 276 | else |
| 277 | ret = !(readb(base + (I2CR << reg_shift)) & I2CR_IEN); |
| 278 | |
| 279 | if (ret) { |
| 280 | writeb(I2CR_IEN, base + (I2CR << reg_shift)); |
Troy Kisky | fef163f | 2012-07-19 08:18:13 +0000 | [diff] [blame] | 281 | /* Wait for controller to be stable */ |
| 282 | udelay(50); |
| 283 | } |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 284 | |
| 285 | if (readb(base + (IADR << reg_shift)) == (chip << 1)) |
| 286 | writeb((chip << 1) ^ 2, base + (IADR << reg_shift)); |
| 287 | writeb(I2SR_IIF_CLEAR, base + (I2SR << reg_shift)); |
| 288 | ret = wait_for_sr_state(i2c_bus, ST_BUS_IDLE); |
Troy Kisky | fef163f | 2012-07-19 08:18:13 +0000 | [diff] [blame] | 289 | if (ret < 0) |
Troy Kisky | eca037a | 2012-07-19 08:18:16 +0000 | [diff] [blame] | 290 | return ret; |
Troy Kisky | a974bcc | 2012-07-19 08:18:11 +0000 | [diff] [blame] | 291 | |
| 292 | /* Start I2C transaction */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 293 | temp = readb(base + (I2CR << reg_shift)); |
Troy Kisky | a974bcc | 2012-07-19 08:18:11 +0000 | [diff] [blame] | 294 | temp |= I2CR_MSTA; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 295 | writeb(temp, base + (I2CR << reg_shift)); |
Troy Kisky | a974bcc | 2012-07-19 08:18:11 +0000 | [diff] [blame] | 296 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 297 | ret = wait_for_sr_state(i2c_bus, ST_BUS_BUSY); |
Troy Kisky | a974bcc | 2012-07-19 08:18:11 +0000 | [diff] [blame] | 298 | if (ret < 0) |
Troy Kisky | eca037a | 2012-07-19 08:18:16 +0000 | [diff] [blame] | 299 | return ret; |
Troy Kisky | 14db6f2 | 2012-07-19 08:18:06 +0000 | [diff] [blame] | 300 | |
Troy Kisky | a974bcc | 2012-07-19 08:18:11 +0000 | [diff] [blame] | 301 | temp |= I2CR_MTX | I2CR_TX_NO_AK; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 302 | writeb(temp, base + (I2CR << reg_shift)); |
Troy Kisky | a974bcc | 2012-07-19 08:18:11 +0000 | [diff] [blame] | 303 | |
Nandor Han | a51f9da | 2017-11-08 15:35:09 +0000 | [diff] [blame] | 304 | if (alen >= 0) { |
| 305 | /* write slave address */ |
| 306 | ret = tx_byte(i2c_bus, chip << 1); |
Troy Kisky | 752ac8f | 2012-07-19 08:18:04 +0000 | [diff] [blame] | 307 | if (ret < 0) |
Troy Kisky | eca037a | 2012-07-19 08:18:16 +0000 | [diff] [blame] | 308 | return ret; |
Nandor Han | a51f9da | 2017-11-08 15:35:09 +0000 | [diff] [blame] | 309 | |
| 310 | while (alen--) { |
| 311 | ret = tx_byte(i2c_bus, (addr >> (alen * 8)) & 0xff); |
| 312 | if (ret < 0) |
| 313 | return ret; |
| 314 | } |
Stefano Babic | 848bb99 | 2011-01-20 07:51:31 +0000 | [diff] [blame] | 315 | } |
Nandor Han | a51f9da | 2017-11-08 15:35:09 +0000 | [diff] [blame] | 316 | |
Troy Kisky | 14db6f2 | 2012-07-19 08:18:06 +0000 | [diff] [blame] | 317 | return 0; |
Troy Kisky | eca037a | 2012-07-19 08:18:16 +0000 | [diff] [blame] | 318 | } |
| 319 | |
Biwen Li | 70a8158 | 2020-07-02 11:13:00 +0800 | [diff] [blame] | 320 | #if !defined(I2C2_BASE_ADDR) |
| 321 | #define I2C2_BASE_ADDR 0 |
| 322 | #endif |
| 323 | |
| 324 | #if !defined(I2C3_BASE_ADDR) |
| 325 | #define I2C3_BASE_ADDR 0 |
| 326 | #endif |
| 327 | |
| 328 | #if !defined(I2C4_BASE_ADDR) |
| 329 | #define I2C4_BASE_ADDR 0 |
| 330 | #endif |
| 331 | |
| 332 | #if !defined(I2C5_BASE_ADDR) |
| 333 | #define I2C5_BASE_ADDR 0 |
| 334 | #endif |
| 335 | |
| 336 | #if !defined(I2C6_BASE_ADDR) |
| 337 | #define I2C6_BASE_ADDR 0 |
| 338 | #endif |
| 339 | |
| 340 | #if !defined(I2C7_BASE_ADDR) |
| 341 | #define I2C7_BASE_ADDR 0 |
| 342 | #endif |
| 343 | |
| 344 | #if !defined(I2C8_BASE_ADDR) |
| 345 | #define I2C8_BASE_ADDR 0 |
| 346 | #endif |
| 347 | |
| 348 | static struct mxc_i2c_bus mxc_i2c_buses[] = { |
| 349 | #if defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_VF610) || \ |
| 350 | defined(CONFIG_FSL_LAYERSCAPE) |
| 351 | { 0, I2C1_BASE_ADDR, I2C_QUIRK_FLAG }, |
| 352 | { 1, I2C2_BASE_ADDR, I2C_QUIRK_FLAG }, |
| 353 | { 2, I2C3_BASE_ADDR, I2C_QUIRK_FLAG }, |
| 354 | { 3, I2C4_BASE_ADDR, I2C_QUIRK_FLAG }, |
| 355 | { 4, I2C5_BASE_ADDR, I2C_QUIRK_FLAG }, |
| 356 | { 5, I2C6_BASE_ADDR, I2C_QUIRK_FLAG }, |
| 357 | { 6, I2C7_BASE_ADDR, I2C_QUIRK_FLAG }, |
| 358 | { 7, I2C8_BASE_ADDR, I2C_QUIRK_FLAG }, |
| 359 | #else |
| 360 | { 0, I2C1_BASE_ADDR, 0 }, |
| 361 | { 1, I2C2_BASE_ADDR, 0 }, |
| 362 | { 2, I2C3_BASE_ADDR, 0 }, |
| 363 | { 3, I2C4_BASE_ADDR, 0 }, |
| 364 | { 4, I2C5_BASE_ADDR, 0 }, |
| 365 | { 5, I2C6_BASE_ADDR, 0 }, |
| 366 | { 6, I2C7_BASE_ADDR, 0 }, |
| 367 | { 7, I2C8_BASE_ADDR, 0 }, |
| 368 | #endif |
| 369 | }; |
| 370 | |
Igor Opaniuk | f7c9176 | 2021-02-09 13:52:45 +0200 | [diff] [blame] | 371 | #if !CONFIG_IS_ENABLED(DM_I2C) |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 372 | int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus) |
| 373 | { |
| 374 | if (i2c_bus && i2c_bus->idle_bus_fn) |
| 375 | return i2c_bus->idle_bus_fn(i2c_bus->idle_bus_data); |
| 376 | return 0; |
| 377 | } |
| 378 | #else |
| 379 | /* |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 380 | * See Linux Documentation/devicetree/bindings/i2c/i2c-imx.txt |
| 381 | * " |
| 382 | * scl-gpios: specify the gpio related to SCL pin |
| 383 | * sda-gpios: specify the gpio related to SDA pin |
| 384 | * add pinctrl to configure i2c pins to gpio function for i2c |
| 385 | * bus recovery, call it "gpio" state |
| 386 | * " |
| 387 | * |
| 388 | * The i2c_idle_bus is an implementation following Linux Kernel. |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 389 | */ |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 390 | int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus) |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 391 | { |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 392 | struct udevice *bus = i2c_bus->bus; |
Lukasz Majewski | bc9aad6 | 2019-04-04 12:35:34 +0200 | [diff] [blame] | 393 | struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus); |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 394 | struct gpio_desc *scl_gpio = &i2c_bus->scl_gpio; |
| 395 | struct gpio_desc *sda_gpio = &i2c_bus->sda_gpio; |
Lukasz Majewski | bc9aad6 | 2019-04-04 12:35:34 +0200 | [diff] [blame] | 396 | int sda, scl, idle_sclks; |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 397 | int i, ret = 0; |
| 398 | ulong elapsed, start_time; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 399 | |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 400 | if (pinctrl_select_state(bus, "gpio")) { |
| 401 | dev_dbg(bus, "Can not to switch to use gpio pinmux\n"); |
| 402 | /* |
| 403 | * GPIO pinctrl for i2c force idle is not a must, |
| 404 | * but it is strongly recommended to be used. |
| 405 | * Because it can help you to recover from bad |
| 406 | * i2c bus state. Do not return failure, because |
| 407 | * it is not a must. |
| 408 | */ |
| 409 | return 0; |
| 410 | } |
| 411 | |
| 412 | dm_gpio_set_dir_flags(scl_gpio, GPIOD_IS_IN); |
| 413 | dm_gpio_set_dir_flags(sda_gpio, GPIOD_IS_IN); |
| 414 | scl = dm_gpio_get_value(scl_gpio); |
| 415 | sda = dm_gpio_get_value(sda_gpio); |
| 416 | |
| 417 | if ((sda & scl) == 1) |
| 418 | goto exit; /* Bus is idle already */ |
| 419 | |
Lukasz Majewski | bc9aad6 | 2019-04-04 12:35:34 +0200 | [diff] [blame] | 420 | /* |
| 421 | * In most cases it is just enough to generate 8 + 1 SCLK |
| 422 | * clocks to recover I2C slave device from 'stuck' state |
| 423 | * (when for example SW reset was performed, in the middle of |
| 424 | * I2C transmission). |
| 425 | * |
| 426 | * However, there are devices which send data in packets of |
| 427 | * N bytes (N > 1). In such case we do need N * 8 + 1 SCLK |
| 428 | * clocks. |
| 429 | */ |
| 430 | idle_sclks = 8 + 1; |
| 431 | |
| 432 | if (i2c->max_transaction_bytes > 0) |
| 433 | idle_sclks = i2c->max_transaction_bytes * 8 + 1; |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 434 | /* Send high and low on the SCL line */ |
Lukasz Majewski | bc9aad6 | 2019-04-04 12:35:34 +0200 | [diff] [blame] | 435 | for (i = 0; i < idle_sclks; i++) { |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 436 | dm_gpio_set_dir_flags(scl_gpio, GPIOD_IS_OUT); |
| 437 | dm_gpio_set_value(scl_gpio, 0); |
| 438 | udelay(50); |
| 439 | dm_gpio_set_dir_flags(scl_gpio, GPIOD_IS_IN); |
| 440 | udelay(50); |
| 441 | } |
| 442 | start_time = get_timer(0); |
| 443 | for (;;) { |
| 444 | dm_gpio_set_dir_flags(scl_gpio, GPIOD_IS_IN); |
| 445 | dm_gpio_set_dir_flags(sda_gpio, GPIOD_IS_IN); |
| 446 | scl = dm_gpio_get_value(scl_gpio); |
| 447 | sda = dm_gpio_get_value(sda_gpio); |
| 448 | if ((sda & scl) == 1) |
| 449 | break; |
Stefan Roese | 80877fa | 2022-09-02 14:10:46 +0200 | [diff] [blame] | 450 | schedule(); |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 451 | elapsed = get_timer(start_time); |
| 452 | if (elapsed > (CONFIG_SYS_HZ / 5)) { /* .2 seconds */ |
| 453 | ret = -EBUSY; |
| 454 | printf("%s: failed to clear bus, sda=%d scl=%d\n", __func__, sda, scl); |
| 455 | break; |
| 456 | } |
| 457 | } |
| 458 | |
| 459 | exit: |
| 460 | pinctrl_select_state(bus, "default"); |
| 461 | return ret; |
| 462 | } |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 463 | #endif |
Biwen Li | 70a8158 | 2020-07-02 11:13:00 +0800 | [diff] [blame] | 464 | /* |
| 465 | * Early init I2C for prepare read the clk through I2C. |
| 466 | */ |
| 467 | void i2c_early_init_f(void) |
| 468 | { |
| 469 | ulong base = mxc_i2c_buses[I2C_EARLY_INIT_INDEX].base; |
| 470 | bool quirk = mxc_i2c_buses[I2C_EARLY_INIT_INDEX].driver_data |
| 471 | & I2C_QUIRK_FLAG ? true : false; |
| 472 | int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; |
| 473 | |
| 474 | /* Set I2C divider value */ |
| 475 | writeb(I2C_IFDR_DIV_CONSERVATIVE, base + (IFDR << reg_shift)); |
| 476 | /* Reset module */ |
| 477 | writeb(I2CR_IDIS, base + (I2CR << reg_shift)); |
| 478 | writeb(0, base + (I2SR << reg_shift)); |
| 479 | /* Enable I2C */ |
| 480 | writeb(I2CR_IEN, base + (I2CR << reg_shift)); |
| 481 | } |
Troy Kisky | a23ab22 | 2012-07-19 08:18:19 +0000 | [diff] [blame] | 482 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 483 | static int i2c_init_transfer(struct mxc_i2c_bus *i2c_bus, u8 chip, |
| 484 | u32 addr, int alen) |
Troy Kisky | eca037a | 2012-07-19 08:18:16 +0000 | [diff] [blame] | 485 | { |
| 486 | int retry; |
| 487 | int ret; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 488 | int reg_shift = i2c_bus->driver_data & I2C_QUIRK_FLAG ? |
| 489 | VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; |
Heiko Schocher | 24ebcf2 | 2015-05-18 10:58:12 +0200 | [diff] [blame] | 490 | |
| 491 | if (!i2c_bus->base) |
Simon Glass | f44b4bf | 2017-09-17 16:54:53 -0600 | [diff] [blame] | 492 | return -EINVAL; |
Heiko Schocher | 24ebcf2 | 2015-05-18 10:58:12 +0200 | [diff] [blame] | 493 | |
Troy Kisky | eca037a | 2012-07-19 08:18:16 +0000 | [diff] [blame] | 494 | for (retry = 0; retry < 3; retry++) { |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 495 | ret = i2c_init_transfer_(i2c_bus, chip, addr, alen); |
Troy Kisky | eca037a | 2012-07-19 08:18:16 +0000 | [diff] [blame] | 496 | if (ret >= 0) |
| 497 | return 0; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 498 | i2c_imx_stop(i2c_bus); |
Simon Glass | f44b4bf | 2017-09-17 16:54:53 -0600 | [diff] [blame] | 499 | if (ret == -EREMOTEIO) |
Troy Kisky | eca037a | 2012-07-19 08:18:16 +0000 | [diff] [blame] | 500 | return ret; |
| 501 | |
| 502 | printf("%s: failed for chip 0x%x retry=%d\n", __func__, chip, |
| 503 | retry); |
| 504 | if (ret != -ERESTART) |
Alison Wang | cf50800 | 2013-06-17 15:30:39 +0800 | [diff] [blame] | 505 | /* Disable controller */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 506 | writeb(I2CR_IDIS, i2c_bus->base + (I2CR << reg_shift)); |
Troy Kisky | eca037a | 2012-07-19 08:18:16 +0000 | [diff] [blame] | 507 | udelay(100); |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 508 | if (i2c_idle_bus(i2c_bus) < 0) |
Troy Kisky | a23ab22 | 2012-07-19 08:18:19 +0000 | [diff] [blame] | 509 | break; |
Troy Kisky | eca037a | 2012-07-19 08:18:16 +0000 | [diff] [blame] | 510 | } |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 511 | printf("%s: give up i2c_regs=0x%lx\n", __func__, i2c_bus->base); |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 512 | return ret; |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 513 | } |
| 514 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 515 | |
| 516 | static int i2c_write_data(struct mxc_i2c_bus *i2c_bus, u8 chip, const u8 *buf, |
| 517 | int len) |
| 518 | { |
| 519 | int i, ret = 0; |
| 520 | |
| 521 | debug("i2c_write_data: chip=0x%x, len=0x%x\n", chip, len); |
| 522 | debug("write_data: "); |
| 523 | /* use rc for counter */ |
| 524 | for (i = 0; i < len; ++i) |
| 525 | debug(" 0x%02x", buf[i]); |
| 526 | debug("\n"); |
| 527 | |
| 528 | for (i = 0; i < len; i++) { |
| 529 | ret = tx_byte(i2c_bus, buf[i]); |
| 530 | if (ret < 0) { |
| 531 | debug("i2c_write_data(): rc=%d\n", ret); |
| 532 | break; |
| 533 | } |
| 534 | } |
| 535 | |
| 536 | return ret; |
| 537 | } |
| 538 | |
Trent Piepho | 9c896a9 | 2019-04-30 16:08:19 +0000 | [diff] [blame] | 539 | /* Will generate a STOP after the last byte if "last" is true, i.e. this is the |
| 540 | * final message of a transaction. If not, it switches the bus back to TX mode |
| 541 | * and does not send a STOP, leaving the bus in a state where a repeated start |
| 542 | * and address can be sent for another message. |
| 543 | */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 544 | static int i2c_read_data(struct mxc_i2c_bus *i2c_bus, uchar chip, uchar *buf, |
Trent Piepho | 9c896a9 | 2019-04-30 16:08:19 +0000 | [diff] [blame] | 545 | int len, bool last) |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 546 | { |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 547 | int ret; |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 548 | unsigned int temp; |
| 549 | int i; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 550 | int reg_shift = i2c_bus->driver_data & I2C_QUIRK_FLAG ? |
| 551 | VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; |
| 552 | ulong base = i2c_bus->base; |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 553 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 554 | debug("i2c_read_data: chip=0x%x, len=0x%x\n", chip, len); |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 555 | |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 556 | /* setup bus to read data */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 557 | temp = readb(base + (I2CR << reg_shift)); |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 558 | temp &= ~(I2CR_MTX | I2CR_TX_NO_AK); |
| 559 | if (len == 1) |
| 560 | temp |= I2CR_TX_NO_AK; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 561 | writeb(temp, base + (I2CR << reg_shift)); |
| 562 | writeb(I2SR_IIF_CLEAR, base + (I2SR << reg_shift)); |
| 563 | /* dummy read to clear ICF */ |
| 564 | readb(base + (I2DR << reg_shift)); |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 565 | |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 566 | /* read data */ |
| 567 | for (i = 0; i < len; i++) { |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 568 | ret = wait_for_sr_state(i2c_bus, ST_IIF); |
Troy Kisky | f024a3b | 2012-07-19 08:18:09 +0000 | [diff] [blame] | 569 | if (ret < 0) { |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 570 | debug("i2c_read_data(): ret=%d\n", ret); |
| 571 | i2c_imx_stop(i2c_bus); |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 572 | return ret; |
Troy Kisky | 0ce898d | 2012-07-19 08:18:07 +0000 | [diff] [blame] | 573 | } |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 574 | |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 575 | if (i == (len - 1)) { |
Trent Piepho | 9c896a9 | 2019-04-30 16:08:19 +0000 | [diff] [blame] | 576 | /* Final byte has already been received by master! When |
| 577 | * we read it from I2DR, the master will start another |
| 578 | * cycle. We must program it first to send a STOP or |
| 579 | * switch to TX to avoid this. |
| 580 | */ |
| 581 | if (last) { |
| 582 | i2c_imx_stop(i2c_bus); |
| 583 | } else { |
| 584 | /* Final read, no stop, switch back to tx */ |
| 585 | temp = readb(base + (I2CR << reg_shift)); |
| 586 | temp |= I2CR_MTX | I2CR_TX_NO_AK; |
| 587 | writeb(temp, base + (I2CR << reg_shift)); |
| 588 | } |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 589 | } else if (i == (len - 2)) { |
Trent Piepho | 9c896a9 | 2019-04-30 16:08:19 +0000 | [diff] [blame] | 590 | /* Master has already recevied penultimate byte. When |
| 591 | * we read it from I2DR, master will start RX of final |
| 592 | * byte. We must set TX_NO_AK now so it does not ACK |
| 593 | * that final byte. |
| 594 | */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 595 | temp = readb(base + (I2CR << reg_shift)); |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 596 | temp |= I2CR_TX_NO_AK; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 597 | writeb(temp, base + (I2CR << reg_shift)); |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 598 | } |
Trent Piepho | 9c896a9 | 2019-04-30 16:08:19 +0000 | [diff] [blame] | 599 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 600 | writeb(I2SR_IIF_CLEAR, base + (I2SR << reg_shift)); |
| 601 | buf[i] = readb(base + (I2DR << reg_shift)); |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 602 | } |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 603 | |
| 604 | /* reuse ret for counter*/ |
| 605 | for (ret = 0; ret < len; ++ret) |
| 606 | debug(" 0x%02x", buf[ret]); |
| 607 | debug("\n"); |
| 608 | |
Trent Piepho | 9c896a9 | 2019-04-30 16:08:19 +0000 | [diff] [blame] | 609 | /* It is not clear to me that this is necessary */ |
| 610 | if (last) |
| 611 | i2c_imx_stop(i2c_bus); |
Troy Kisky | f024a3b | 2012-07-19 08:18:09 +0000 | [diff] [blame] | 612 | return 0; |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 613 | } |
| 614 | |
Chuanhua Han | d24d2d9 | 2019-07-10 21:00:22 +0800 | [diff] [blame] | 615 | int __enable_i2c_clk(unsigned char enable, unsigned int i2c_num) |
| 616 | { |
| 617 | return 1; |
| 618 | } |
| 619 | |
| 620 | int enable_i2c_clk(unsigned char enable, unsigned int i2c_num) |
| 621 | __attribute__((weak, alias("__enable_i2c_clk"))); |
| 622 | |
Igor Opaniuk | f7c9176 | 2021-02-09 13:52:45 +0200 | [diff] [blame] | 623 | #if !CONFIG_IS_ENABLED(DM_I2C) |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 624 | /* |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 625 | * Read data from I2C device |
Trent Piepho | 15410ba | 2019-04-30 16:08:18 +0000 | [diff] [blame] | 626 | * |
| 627 | * The transactions use the syntax defined in the Linux kernel I2C docs. |
| 628 | * |
| 629 | * If alen is > 0, then this function will send a transaction of the form: |
| 630 | * S Chip Wr [A] Addr [A] S Chip Rd [A] [data] A ... NA P |
| 631 | * This is a normal I2C register read: writing the register address, then doing |
| 632 | * a repeated start and reading the data. |
| 633 | * |
| 634 | * If alen == 0, then we get this transaction: |
| 635 | * S Chip Wr [A] S Chip Rd [A] [data] A ... NA P |
| 636 | * This is somewhat unusual, though valid, transaction. It addresses the chip |
| 637 | * in write mode, but doesn't actually write any register address or data, then |
| 638 | * does a repeated start and reads data. |
| 639 | * |
| 640 | * If alen < 0, then we get this transaction: |
| 641 | * S Chip Rd [A] [data] A ... NA P |
| 642 | * The chip is addressed in read mode and then data is read. No register |
| 643 | * address is written first. This is perfectly valid on most devices and |
| 644 | * required on some (usually those that don't act like an array of registers). |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 645 | */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 646 | static int bus_i2c_read(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr, |
| 647 | int alen, u8 *buf, int len) |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 648 | { |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 649 | int ret = 0; |
| 650 | u32 temp; |
| 651 | int reg_shift = i2c_bus->driver_data & I2C_QUIRK_FLAG ? |
| 652 | VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; |
| 653 | ulong base = i2c_bus->base; |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 654 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 655 | ret = i2c_init_transfer(i2c_bus, chip, addr, alen); |
Troy Kisky | 752ac8f | 2012-07-19 08:18:04 +0000 | [diff] [blame] | 656 | if (ret < 0) |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 657 | return ret; |
Sascha Hauer | 15ea70f | 2008-03-26 20:40:49 +0100 | [diff] [blame] | 658 | |
Nandor Han | a51f9da | 2017-11-08 15:35:09 +0000 | [diff] [blame] | 659 | if (alen >= 0) { |
| 660 | temp = readb(base + (I2CR << reg_shift)); |
| 661 | temp |= I2CR_RSTA; |
| 662 | writeb(temp, base + (I2CR << reg_shift)); |
| 663 | } |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 664 | |
| 665 | ret = tx_byte(i2c_bus, (chip << 1) | 1); |
| 666 | if (ret < 0) { |
| 667 | i2c_imx_stop(i2c_bus); |
| 668 | return ret; |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 669 | } |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 670 | |
Trent Piepho | 9c896a9 | 2019-04-30 16:08:19 +0000 | [diff] [blame] | 671 | ret = i2c_read_data(i2c_bus, chip, buf, len, true); |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 672 | |
| 673 | i2c_imx_stop(i2c_bus); |
| 674 | return ret; |
| 675 | } |
| 676 | |
| 677 | /* |
| 678 | * Write data to I2C device |
Trent Piepho | 15410ba | 2019-04-30 16:08:18 +0000 | [diff] [blame] | 679 | * |
| 680 | * If alen > 0, we get this transaction: |
| 681 | * S Chip Wr [A] addr [A] data [A] ... [A] P |
| 682 | * An ordinary write register command. |
| 683 | * |
| 684 | * If alen == 0, then we get this: |
| 685 | * S Chip Wr [A] data [A] ... [A] P |
| 686 | * This is a simple I2C write. |
| 687 | * |
| 688 | * If alen < 0, then we get this: |
| 689 | * S data [A] ... [A] P |
| 690 | * This is most likely NOT something that should be used. It doesn't send the |
| 691 | * chip address first, so in effect, the first byte of data will be used as the |
| 692 | * address. |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 693 | */ |
| 694 | static int bus_i2c_write(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr, |
| 695 | int alen, const u8 *buf, int len) |
| 696 | { |
| 697 | int ret = 0; |
| 698 | |
| 699 | ret = i2c_init_transfer(i2c_bus, chip, addr, alen); |
| 700 | if (ret < 0) |
| 701 | return ret; |
| 702 | |
| 703 | ret = i2c_write_data(i2c_bus, chip, buf, len); |
| 704 | |
| 705 | i2c_imx_stop(i2c_bus); |
| 706 | |
Marek Vasut | 94cb842 | 2011-09-22 09:22:12 +0000 | [diff] [blame] | 707 | return ret; |
| 708 | } |
Troy Kisky | 321a42b | 2012-07-19 08:18:08 +0000 | [diff] [blame] | 709 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 710 | struct mxc_i2c_bus *i2c_get_base(struct i2c_adapter *adap) |
Troy Kisky | a23ab22 | 2012-07-19 08:18:19 +0000 | [diff] [blame] | 711 | { |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 712 | return &mxc_i2c_buses[adap->hwadapnr]; |
Troy Kisky | a23ab22 | 2012-07-19 08:18:19 +0000 | [diff] [blame] | 713 | } |
Troy Kisky | b6f9826 | 2012-07-19 08:18:20 +0000 | [diff] [blame] | 714 | |
trem | a49f40a | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 715 | static int mxc_i2c_read(struct i2c_adapter *adap, uint8_t chip, |
| 716 | uint addr, int alen, uint8_t *buffer, |
| 717 | int len) |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 718 | { |
trem | a49f40a | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 719 | return bus_i2c_read(i2c_get_base(adap), chip, addr, alen, buffer, len); |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 720 | } |
| 721 | |
trem | a49f40a | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 722 | static int mxc_i2c_write(struct i2c_adapter *adap, uint8_t chip, |
| 723 | uint addr, int alen, uint8_t *buffer, |
| 724 | int len) |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 725 | { |
trem | a49f40a | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 726 | return bus_i2c_write(i2c_get_base(adap), chip, addr, alen, buffer, len); |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 727 | } |
| 728 | |
| 729 | /* |
Troy Kisky | 321a42b | 2012-07-19 08:18:08 +0000 | [diff] [blame] | 730 | * Test if a chip at a given address responds (probe the chip) |
| 731 | */ |
trem | a49f40a | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 732 | static int mxc_i2c_probe(struct i2c_adapter *adap, uint8_t chip) |
Troy Kisky | 321a42b | 2012-07-19 08:18:08 +0000 | [diff] [blame] | 733 | { |
trem | a49f40a | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 734 | return bus_i2c_write(i2c_get_base(adap), chip, 0, 0, NULL, 0); |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 735 | } |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 736 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 737 | void bus_i2c_init(int index, int speed, int unused, |
| 738 | int (*idle_bus_fn)(void *p), void *idle_bus_data) |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 739 | { |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 740 | int ret; |
| 741 | |
| 742 | if (index >= ARRAY_SIZE(mxc_i2c_buses)) { |
| 743 | debug("Error i2c index\n"); |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 744 | return; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 745 | } |
| 746 | |
Simon Glass | 34d37a6 | 2023-02-05 15:40:11 -0700 | [diff] [blame] | 747 | if (IS_ENABLED(CONFIG_IMX_MODULE_FUSE)) { |
Peng Fan | 23d4ee3 | 2020-05-01 22:08:35 +0800 | [diff] [blame] | 748 | if (i2c_fused((ulong)mxc_i2c_buses[index].base)) { |
| 749 | printf("SoC fuse indicates I2C@0x%lx is unavailable.\n", |
| 750 | (ulong)mxc_i2c_buses[index].base); |
| 751 | return; |
| 752 | } |
| 753 | } |
| 754 | |
Gong Qianyu | fd99908 | 2015-12-18 17:38:01 +0800 | [diff] [blame] | 755 | /* |
| 756 | * Warning: Be careful to allow the assignment to a static |
| 757 | * variable here. This function could be called while U-Boot is |
| 758 | * still running in flash memory. So such assignment is equal |
| 759 | * to write data to flash without erasing. |
| 760 | */ |
| 761 | if (idle_bus_fn) |
| 762 | mxc_i2c_buses[index].idle_bus_fn = idle_bus_fn; |
| 763 | if (idle_bus_data) |
| 764 | mxc_i2c_buses[index].idle_bus_data = idle_bus_data; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 765 | |
| 766 | ret = enable_i2c_clk(1, index); |
| 767 | if (ret < 0) { |
| 768 | debug("I2C-%d clk fail to enable.\n", index); |
| 769 | return; |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 770 | } |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 771 | |
| 772 | bus_i2c_set_bus_speed(&mxc_i2c_buses[index], speed); |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 773 | } |
| 774 | |
Yuan Yao | d40c885 | 2016-06-08 18:24:51 +0800 | [diff] [blame] | 775 | /* |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 776 | * Init I2C Bus |
| 777 | */ |
trem | a49f40a | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 778 | static void mxc_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr) |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 779 | { |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 780 | bus_i2c_init(adap->hwadapnr, speed, slaveaddr, NULL, NULL); |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 781 | } |
| 782 | |
| 783 | /* |
| 784 | * Set I2C Speed |
| 785 | */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 786 | static u32 mxc_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed) |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 787 | { |
trem | a49f40a | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 788 | return bus_i2c_set_bus_speed(i2c_get_base(adap), speed); |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 789 | } |
| 790 | |
| 791 | /* |
trem | a49f40a | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 792 | * Register mxc i2c adapters |
Troy Kisky | ae44760 | 2012-07-19 08:18:18 +0000 | [diff] [blame] | 793 | */ |
Albert ARIBAUD \\(3ADEV\\) | eb94387 | 2015-09-21 22:43:38 +0200 | [diff] [blame] | 794 | #ifdef CONFIG_SYS_I2C_MXC_I2C1 |
trem | a49f40a | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 795 | U_BOOT_I2C_ADAP_COMPLETE(mxc0, mxc_i2c_init, mxc_i2c_probe, |
| 796 | mxc_i2c_read, mxc_i2c_write, |
| 797 | mxc_i2c_set_bus_speed, |
| 798 | CONFIG_SYS_MXC_I2C1_SPEED, |
| 799 | CONFIG_SYS_MXC_I2C1_SLAVE, 0) |
Albert ARIBAUD \\(3ADEV\\) | eb94387 | 2015-09-21 22:43:38 +0200 | [diff] [blame] | 800 | #endif |
| 801 | |
| 802 | #ifdef CONFIG_SYS_I2C_MXC_I2C2 |
trem | a49f40a | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 803 | U_BOOT_I2C_ADAP_COMPLETE(mxc1, mxc_i2c_init, mxc_i2c_probe, |
| 804 | mxc_i2c_read, mxc_i2c_write, |
| 805 | mxc_i2c_set_bus_speed, |
| 806 | CONFIG_SYS_MXC_I2C2_SPEED, |
| 807 | CONFIG_SYS_MXC_I2C2_SLAVE, 1) |
Albert ARIBAUD \\(3ADEV\\) | eb94387 | 2015-09-21 22:43:38 +0200 | [diff] [blame] | 808 | #endif |
| 809 | |
York Sun | f1a5216 | 2015-03-20 10:20:40 -0700 | [diff] [blame] | 810 | #ifdef CONFIG_SYS_I2C_MXC_I2C3 |
trem | a49f40a | 2013-09-21 18:13:35 +0200 | [diff] [blame] | 811 | U_BOOT_I2C_ADAP_COMPLETE(mxc2, mxc_i2c_init, mxc_i2c_probe, |
| 812 | mxc_i2c_read, mxc_i2c_write, |
| 813 | mxc_i2c_set_bus_speed, |
| 814 | CONFIG_SYS_MXC_I2C3_SPEED, |
| 815 | CONFIG_SYS_MXC_I2C3_SLAVE, 2) |
| 816 | #endif |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 817 | |
York Sun | f1a5216 | 2015-03-20 10:20:40 -0700 | [diff] [blame] | 818 | #ifdef CONFIG_SYS_I2C_MXC_I2C4 |
| 819 | U_BOOT_I2C_ADAP_COMPLETE(mxc3, mxc_i2c_init, mxc_i2c_probe, |
| 820 | mxc_i2c_read, mxc_i2c_write, |
| 821 | mxc_i2c_set_bus_speed, |
| 822 | CONFIG_SYS_MXC_I2C4_SPEED, |
| 823 | CONFIG_SYS_MXC_I2C4_SLAVE, 3) |
| 824 | #endif |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 825 | |
Sriram Dash | a64aa19 | 2018-02-06 11:26:31 +0530 | [diff] [blame] | 826 | #ifdef CONFIG_SYS_I2C_MXC_I2C5 |
| 827 | U_BOOT_I2C_ADAP_COMPLETE(mxc4, mxc_i2c_init, mxc_i2c_probe, |
| 828 | mxc_i2c_read, mxc_i2c_write, |
| 829 | mxc_i2c_set_bus_speed, |
| 830 | CONFIG_SYS_MXC_I2C5_SPEED, |
| 831 | CONFIG_SYS_MXC_I2C5_SLAVE, 4) |
| 832 | #endif |
| 833 | |
| 834 | #ifdef CONFIG_SYS_I2C_MXC_I2C6 |
| 835 | U_BOOT_I2C_ADAP_COMPLETE(mxc5, mxc_i2c_init, mxc_i2c_probe, |
| 836 | mxc_i2c_read, mxc_i2c_write, |
| 837 | mxc_i2c_set_bus_speed, |
| 838 | CONFIG_SYS_MXC_I2C6_SPEED, |
| 839 | CONFIG_SYS_MXC_I2C6_SLAVE, 5) |
| 840 | #endif |
| 841 | |
| 842 | #ifdef CONFIG_SYS_I2C_MXC_I2C7 |
| 843 | U_BOOT_I2C_ADAP_COMPLETE(mxc6, mxc_i2c_init, mxc_i2c_probe, |
| 844 | mxc_i2c_read, mxc_i2c_write, |
| 845 | mxc_i2c_set_bus_speed, |
| 846 | CONFIG_SYS_MXC_I2C7_SPEED, |
| 847 | CONFIG_SYS_MXC_I2C7_SLAVE, 6) |
| 848 | #endif |
| 849 | |
| 850 | #ifdef CONFIG_SYS_I2C_MXC_I2C8 |
| 851 | U_BOOT_I2C_ADAP_COMPLETE(mxc7, mxc_i2c_init, mxc_i2c_probe, |
| 852 | mxc_i2c_read, mxc_i2c_write, |
| 853 | mxc_i2c_set_bus_speed, |
| 854 | CONFIG_SYS_MXC_I2C8_SPEED, |
| 855 | CONFIG_SYS_MXC_I2C8_SLAVE, 7) |
| 856 | #endif |
| 857 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 858 | #else |
| 859 | |
| 860 | static int mxc_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) |
| 861 | { |
| 862 | struct mxc_i2c_bus *i2c_bus = dev_get_priv(bus); |
| 863 | |
| 864 | return bus_i2c_set_bus_speed(i2c_bus, speed); |
| 865 | } |
| 866 | |
| 867 | static int mxc_i2c_probe(struct udevice *bus) |
| 868 | { |
| 869 | struct mxc_i2c_bus *i2c_bus = dev_get_priv(bus); |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 870 | const void *fdt = gd->fdt_blob; |
Simon Glass | dd79d6e | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 871 | int node = dev_of_offset(bus); |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 872 | fdt_addr_t addr; |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 873 | int ret, ret2; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 874 | |
| 875 | i2c_bus->driver_data = dev_get_driver_data(bus); |
| 876 | |
Masahiro Yamada | a89b4de | 2020-07-17 14:36:48 +0900 | [diff] [blame] | 877 | addr = dev_read_addr(bus); |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 878 | if (addr == FDT_ADDR_T_NONE) |
Simon Glass | f44b4bf | 2017-09-17 16:54:53 -0600 | [diff] [blame] | 879 | return -EINVAL; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 880 | |
Simon Glass | 34d37a6 | 2023-02-05 15:40:11 -0700 | [diff] [blame] | 881 | if (IS_ENABLED(CONFIG_IMX_MODULE_FUSE)) { |
Peng Fan | 23d4ee3 | 2020-05-01 22:08:35 +0800 | [diff] [blame] | 882 | if (i2c_fused((ulong)addr)) { |
| 883 | printf("SoC fuse indicates I2C@0x%lx is unavailable.\n", |
| 884 | (ulong)addr); |
| 885 | return -ENODEV; |
| 886 | } |
| 887 | } |
| 888 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 889 | i2c_bus->base = addr; |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 890 | i2c_bus->index = dev_seq(bus); |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 891 | i2c_bus->bus = bus; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 892 | |
| 893 | /* Enable clk */ |
Peng Fan | 87ea562 | 2019-08-08 01:43:30 +0000 | [diff] [blame] | 894 | #if CONFIG_IS_ENABLED(CLK) |
| 895 | ret = clk_get_by_index(bus, 0, &i2c_bus->per_clk); |
| 896 | if (ret) { |
| 897 | printf("Failed to get i2c clk\n"); |
| 898 | return ret; |
| 899 | } |
| 900 | ret = clk_enable(&i2c_bus->per_clk); |
| 901 | if (ret) { |
| 902 | printf("Failed to enable i2c clk\n"); |
| 903 | return ret; |
| 904 | } |
| 905 | #else |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 906 | ret = enable_i2c_clk(1, dev_seq(bus)); |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 907 | if (ret < 0) |
| 908 | return ret; |
Peng Fan | 87ea562 | 2019-08-08 01:43:30 +0000 | [diff] [blame] | 909 | #endif |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 910 | |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 911 | /* |
| 912 | * See Documentation/devicetree/bindings/i2c/i2c-imx.txt |
| 913 | * Use gpio to force bus idle when necessary. |
| 914 | */ |
Simon Glass | b0ea740 | 2016-10-02 17:59:28 -0600 | [diff] [blame] | 915 | ret = fdt_stringlist_search(fdt, node, "pinctrl-names", "gpio"); |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 916 | if (ret < 0) { |
Sean Anderson | fbba69f | 2020-09-15 10:44:39 -0400 | [diff] [blame] | 917 | debug("i2c bus %d at 0x%2lx, no gpio pinctrl state.\n", |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 918 | dev_seq(bus), i2c_bus->base); |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 919 | } else { |
Simon Glass | 1d9af1f | 2017-05-30 21:47:09 -0600 | [diff] [blame] | 920 | ret = gpio_request_by_name_nodev(offset_to_ofnode(node), |
| 921 | "scl-gpios", 0, &i2c_bus->scl_gpio, |
| 922 | GPIOD_IS_OUT); |
| 923 | ret2 = gpio_request_by_name_nodev(offset_to_ofnode(node), |
| 924 | "sda-gpios", 0, &i2c_bus->sda_gpio, |
| 925 | GPIOD_IS_OUT); |
Peng Fan | 08eaa83 | 2017-12-29 15:06:08 +0800 | [diff] [blame] | 926 | if (!dm_gpio_is_valid(&i2c_bus->sda_gpio) || |
| 927 | !dm_gpio_is_valid(&i2c_bus->scl_gpio) || |
| 928 | ret || ret2) { |
Sean Anderson | fbba69f | 2020-09-15 10:44:39 -0400 | [diff] [blame] | 929 | dev_err(bus, |
Marc Ferland | 323069e | 2020-12-21 09:50:16 -0500 | [diff] [blame] | 930 | "i2c bus %d at 0x%2lx, fail to request scl/sda gpio\n", |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 931 | dev_seq(bus), i2c_bus->base); |
Simon Glass | f44b4bf | 2017-09-17 16:54:53 -0600 | [diff] [blame] | 932 | return -EINVAL; |
Peng Fan | 4f1a581 | 2016-03-11 16:47:50 +0800 | [diff] [blame] | 933 | } |
| 934 | } |
| 935 | |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 936 | /* |
| 937 | * Pinmux settings are in board file now, until pinmux is supported, |
| 938 | * we can set pinmux here in probe function. |
| 939 | */ |
| 940 | |
| 941 | debug("i2c : controller bus %d at %lu , speed %d: ", |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 942 | dev_seq(bus), i2c_bus->base, |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 943 | i2c_bus->speed); |
| 944 | |
| 945 | return 0; |
| 946 | } |
| 947 | |
Trent Piepho | 15410ba | 2019-04-30 16:08:18 +0000 | [diff] [blame] | 948 | /* Sends: S Addr Wr [A|NA] P */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 949 | static int mxc_i2c_probe_chip(struct udevice *bus, u32 chip_addr, |
| 950 | u32 chip_flags) |
| 951 | { |
| 952 | int ret; |
| 953 | struct mxc_i2c_bus *i2c_bus = dev_get_priv(bus); |
| 954 | |
| 955 | ret = i2c_init_transfer(i2c_bus, chip_addr, 0, 0); |
| 956 | if (ret < 0) { |
| 957 | debug("%s failed, ret = %d\n", __func__, ret); |
| 958 | return ret; |
| 959 | } |
| 960 | |
| 961 | i2c_imx_stop(i2c_bus); |
| 962 | |
| 963 | return 0; |
| 964 | } |
| 965 | |
| 966 | static int mxc_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) |
| 967 | { |
| 968 | struct mxc_i2c_bus *i2c_bus = dev_get_priv(bus); |
| 969 | int ret = 0; |
| 970 | ulong base = i2c_bus->base; |
| 971 | int reg_shift = i2c_bus->driver_data & I2C_QUIRK_FLAG ? |
| 972 | VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; |
Trent Piepho | 9c896a9 | 2019-04-30 16:08:19 +0000 | [diff] [blame] | 973 | int read_mode; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 974 | |
Trent Piepho | 9c896a9 | 2019-04-30 16:08:19 +0000 | [diff] [blame] | 975 | /* Here address len is set to -1 to not send any address at first. |
| 976 | * Otherwise i2c_init_transfer will send the chip address with write |
| 977 | * mode set. This is wrong if the 1st message is read. |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 978 | */ |
Trent Piepho | 9c896a9 | 2019-04-30 16:08:19 +0000 | [diff] [blame] | 979 | ret = i2c_init_transfer(i2c_bus, msg->addr, 0, -1); |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 980 | if (ret < 0) { |
| 981 | debug("i2c_init_transfer error: %d\n", ret); |
| 982 | return ret; |
| 983 | } |
| 984 | |
Trent Piepho | 9c896a9 | 2019-04-30 16:08:19 +0000 | [diff] [blame] | 985 | read_mode = -1; /* So it's always different on the first message */ |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 986 | for (; nmsgs > 0; nmsgs--, msg++) { |
Trent Piepho | 9c896a9 | 2019-04-30 16:08:19 +0000 | [diff] [blame] | 987 | const int msg_is_read = !!(msg->flags & I2C_M_RD); |
| 988 | |
| 989 | debug("i2c_xfer: chip=0x%x, len=0x%x, dir=%c\n", msg->addr, |
| 990 | msg->len, msg_is_read ? 'R' : 'W'); |
| 991 | |
| 992 | if (msg_is_read != read_mode) { |
| 993 | /* Send repeated start if not 1st message */ |
| 994 | if (read_mode != -1) { |
| 995 | debug("i2c_xfer: [RSTART]\n"); |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 996 | ret = readb(base + (I2CR << reg_shift)); |
| 997 | ret |= I2CR_RSTA; |
| 998 | writeb(ret, base + (I2CR << reg_shift)); |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 999 | } |
Trent Piepho | 9c896a9 | 2019-04-30 16:08:19 +0000 | [diff] [blame] | 1000 | debug("i2c_xfer: [ADDR %02x | %c]\n", msg->addr, |
| 1001 | msg_is_read ? 'R' : 'W'); |
| 1002 | ret = tx_byte(i2c_bus, (msg->addr << 1) | msg_is_read); |
| 1003 | if (ret < 0) { |
| 1004 | debug("i2c_xfer: [STOP]\n"); |
| 1005 | i2c_imx_stop(i2c_bus); |
| 1006 | break; |
| 1007 | } |
| 1008 | read_mode = msg_is_read; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 1009 | } |
Trent Piepho | 9c896a9 | 2019-04-30 16:08:19 +0000 | [diff] [blame] | 1010 | |
| 1011 | if (msg->flags & I2C_M_RD) |
| 1012 | ret = i2c_read_data(i2c_bus, msg->addr, msg->buf, |
| 1013 | msg->len, nmsgs == 1 || |
| 1014 | (msg->flags & I2C_M_STOP)); |
| 1015 | else |
| 1016 | ret = i2c_write_data(i2c_bus, msg->addr, msg->buf, |
| 1017 | msg->len); |
| 1018 | |
| 1019 | if (ret < 0) |
| 1020 | break; |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 1021 | } |
| 1022 | |
| 1023 | if (ret) |
| 1024 | debug("i2c_write: error sending\n"); |
| 1025 | |
| 1026 | i2c_imx_stop(i2c_bus); |
| 1027 | |
| 1028 | return ret; |
| 1029 | } |
| 1030 | |
| 1031 | static const struct dm_i2c_ops mxc_i2c_ops = { |
| 1032 | .xfer = mxc_i2c_xfer, |
| 1033 | .probe_chip = mxc_i2c_probe_chip, |
| 1034 | .set_bus_speed = mxc_i2c_set_bus_speed, |
| 1035 | }; |
| 1036 | |
| 1037 | static const struct udevice_id mxc_i2c_ids[] = { |
| 1038 | { .compatible = "fsl,imx21-i2c", }, |
| 1039 | { .compatible = "fsl,vf610-i2c", .data = I2C_QUIRK_FLAG, }, |
| 1040 | {} |
| 1041 | }; |
| 1042 | |
| 1043 | U_BOOT_DRIVER(i2c_mxc) = { |
| 1044 | .name = "i2c_mxc", |
| 1045 | .id = UCLASS_I2C, |
| 1046 | .of_match = mxc_i2c_ids, |
| 1047 | .probe = mxc_i2c_probe, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 1048 | .priv_auto = sizeof(struct mxc_i2c_bus), |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 1049 | .ops = &mxc_i2c_ops, |
Biwen Li | 41a5abc | 2019-12-31 15:33:39 +0800 | [diff] [blame] | 1050 | .flags = DM_FLAG_PRE_RELOC, |
Peng Fan | 8262cb1 | 2015-05-15 07:29:12 +0800 | [diff] [blame] | 1051 | }; |
| 1052 | #endif |