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git01.mediatek.com / filogic / uboot / 2f4b6424cfc561140092cdc6b66c864a960b75a7 / . / arch / arm / dts / r8a77990-ebisu-u-boot.dts
blob: 1ce22e5c0f773ee1f6b654e3c1ce3d59d4140cd4 [file] [log] [blame]
Tom Rini24672242018-06-01 21:10:18 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Marek Vasut2a46a0b2018-04-26 13:31:39 +0200[diff] [blame]2/*
3 * Device Tree Source extras for U-Boot for the Ebisu board
4 *
5 * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
Marek Vasut2a46a0b2018-04-26 13:31:39 +0200[diff] [blame]6 */
7
8#include "r8a77990-ebisu.dts"
9#include "r8a77990-u-boot.dtsi"
Marek Vasutee5b69f2018-12-03 22:12:47 +0100[diff] [blame]10
Marek Vasutee5b69f2018-12-03 22:12:47 +0100[diff] [blame]11&pfc {
Marek Vasut5b16ba92018-12-03 22:14:09 +0100[diff] [blame]12 pinctrl-0 = <&scif_clk_pins>;
13 pinctrl-names = "default";
14
Marek Vasut5b16ba92018-12-03 22:14:09 +0100[diff] [blame]15 scif_clk_pins: scif_clk {
16 groups = "scif_clk_a";
17 function = "scif_clk";
18 };
Marek Vasut5b16ba92018-12-03 22:14:09 +0100[diff] [blame]19};
20
Marek Vasutee5b69f2018-12-03 22:12:47 +0100[diff] [blame]21&sdhi0 {
Marek Vasutee5b69f2018-12-03 22:12:47 +0100[diff] [blame]22 sd-uhs-sdr12;
23 sd-uhs-sdr25;
Marek Vasutee5b69f2018-12-03 22:12:47 +0100[diff] [blame]24 max-frequency = <208000000>;
25};
26
27&sdhi1 {
Marek Vasutee5b69f2018-12-03 22:12:47 +0100[diff] [blame]28 sd-uhs-sdr12;
29 sd-uhs-sdr25;
Marek Vasutee5b69f2018-12-03 22:12:47 +0100[diff] [blame]30 max-frequency = <208000000>;
31};