Bin Meng | 2f32622 | 2014-12-17 15:50:40 +0800 | [diff] [blame] | 1 | # |
| 2 | # Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> |
| 3 | # |
| 4 | # SPDX-License-Identifier: GPL-2.0+ |
| 5 | # |
| 6 | |
| 7 | config INTEL_QUEENSBAY |
| 8 | bool |
| 9 | select HAVE_FSP |
| 10 | select HAVE_CMC |
Bin Meng | 6f40e7c | 2017-07-30 06:23:13 -0700 | [diff] [blame] | 11 | select ARCH_EARLY_INIT_R |
Bin Meng | 2f2c891 | 2017-07-30 06:23:21 -0700 | [diff] [blame^] | 12 | imply ENV_IS_IN_SPI_FLASH |
| 13 | imply ICH_SPI |
| 14 | imply MMC |
| 15 | imply MMC_PCI |
| 16 | imply MMC_SDHCI |
| 17 | imply MMC_SDHCI_SDMA |
| 18 | imply PCH_GBE |
| 19 | imply SCSI |
| 20 | imply SPI_FLASH |
| 21 | imply SYS_NS16550 |
| 22 | imply VIDEO_VESA |
Bin Meng | 2f32622 | 2014-12-17 15:50:40 +0800 | [diff] [blame] | 23 | |
| 24 | if INTEL_QUEENSBAY |
| 25 | |
Bin Meng | 2f32622 | 2014-12-17 15:50:40 +0800 | [diff] [blame] | 26 | config HAVE_CMC |
| 27 | bool "Add a Chipset Micro Code state machine binary" |
| 28 | help |
| 29 | Select this option to add a Chipset Micro Code state machine binary |
| 30 | to the resulting U-Boot image. It is a 64K data block of machine |
| 31 | specific code which must be put in the flash for the processor to |
| 32 | access when powered up before system BIOS is executed. |
| 33 | |
| 34 | config CMC_FILE |
| 35 | string "Chipset Micro Code state machine filename" |
| 36 | depends on HAVE_CMC |
| 37 | default "cmc.bin" |
| 38 | help |
| 39 | The filename of the file to use as Chipset Micro Code state machine |
| 40 | binary in the board directory. |
| 41 | |
Bin Meng | 293f497 | 2014-12-17 15:50:42 +0800 | [diff] [blame] | 42 | config CMC_ADDR |
Bin Meng | 2f32622 | 2014-12-17 15:50:40 +0800 | [diff] [blame] | 43 | hex "Chipset Micro Code state machine binary location" |
| 44 | depends on HAVE_CMC |
| 45 | default 0xfffb0000 |
| 46 | help |
| 47 | The location of the CMC binary is determined by a strap. It must be |
| 48 | put in flash at a location matching the strap-determined base address. |
| 49 | |
| 50 | The default base address of 0xfffb0000 indicates that the binary must |
| 51 | be located at offset 0xb0000 from the beginning of a 1MB flash device. |
| 52 | |
Bin Meng | fcf3bdd | 2015-07-06 16:31:31 +0800 | [diff] [blame] | 53 | config CPU_ADDR_BITS |
| 54 | int |
| 55 | default 32 |
| 56 | |
Bin Meng | 2f0999e | 2015-10-01 00:36:04 -0700 | [diff] [blame] | 57 | config DISABLE_IGD |
| 58 | bool "Disable Integrated Graphics Device (IGD)" |
| 59 | help |
| 60 | Disable the Integrated Graphics Device (IGD) so that it does not |
| 61 | show in the PCI configuration space as a VGA disaplay controller. |
| 62 | This gives a chance for U-Boot to run PCI/PCIe based graphics |
| 63 | card's VGA BIOS and use that card for the graphics console. |
| 64 | |
Bin Meng | 2f32622 | 2014-12-17 15:50:40 +0800 | [diff] [blame] | 65 | endif |