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Stefan Roese73606402015-10-20 15:14:47 +02001/*
2 * Copyright (C) 2015 Stefan Roese <sr@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef _CONFIG_CLEARFOG_H
8#define _CONFIG_CLEARFOG_H
9
10/*
11 * High Level Configuration Options (easy to change)
12 */
Stefan Roese73606402015-10-20 15:14:47 +020013
14#define CONFIG_DISPLAY_BOARDINFO_LATE
15
16/*
17 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
18 * for DDR ECC byte filling in the SPL before loading the main
19 * U-Boot into it.
20 */
21#define CONFIG_SYS_TEXT_BASE 0x00800000
22#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
23
24/*
25 * Commands configuration
26 */
Stefan Roese73606402015-10-20 15:14:47 +020027#define CONFIG_CMD_PCI
Stefan Roese73606402015-10-20 15:14:47 +020028
29/* I2C */
30#define CONFIG_SYS_I2C
31#define CONFIG_SYS_I2C_MVTWSI
32#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
33#define CONFIG_SYS_I2C_SLAVE 0x0
34#define CONFIG_SYS_I2C_SPEED 100000
35
36/* SPI NOR flash default params, used by sf commands */
37#define CONFIG_SF_DEFAULT_SPEED 1000000
38#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
39#define CONFIG_SPI_FLASH_STMICRO
40
41/*
42 * SDIO/MMC Card Configuration
43 */
Stefan Roese73606402015-10-20 15:14:47 +020044#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
45
46/* Partition support */
Stefan Roese73606402015-10-20 15:14:47 +020047
48/* Additional FS support/configuration */
49#define CONFIG_SUPPORT_VFAT
50
51/* USB/EHCI configuration */
52#define CONFIG_EHCI_IS_TDI
53
54#define CONFIG_ENV_MIN_ENTRIES 128
55
56/* Environment in MMC */
57#define CONFIG_ENV_IS_IN_MMC
58#define CONFIG_SYS_MMC_ENV_DEV 0
59#define CONFIG_ENV_SECT_SIZE 0x200
60#define CONFIG_ENV_SIZE 0x10000
61/*
62 * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC
63 * boot image starts @ LBA-0.
64 * As result in MMC/eMMC case it will be a 1 sector gap between u-boot
65 * image and environment
66 */
67#define CONFIG_ENV_OFFSET 0xf0000
68#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
69
70#define CONFIG_PHY_MARVELL /* there is a marvell phy */
71#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
72
73/* PCIe support */
74#ifndef CONFIG_SPL_BUILD
Stefan Roese73606402015-10-20 15:14:47 +020075#define CONFIG_PCI_MVEBU
Stefan Roese73606402015-10-20 15:14:47 +020076#define CONFIG_PCI_SCAN_SHOW
77#endif
78
Stefan Roese73606402015-10-20 15:14:47 +020079#define CONFIG_SYS_ALT_MEMTEST
80
81/* Keep device tree and initrd in lower memory so the kernel can access them */
Patrick Wildt7e5b0192017-05-10 15:12:34 +020082#define RELOCATION_LIMITS_ENV_SETTINGS \
Stefan Roese73606402015-10-20 15:14:47 +020083 "fdt_high=0x10000000\0" \
84 "initrd_high=0x10000000\0"
85
86/* SPL */
87/*
88 * Select the boot device here
89 *
90 * Currently supported are:
91 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
92 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
93 */
94#define SPL_BOOT_SPI_NOR_FLASH 1
95#define SPL_BOOT_SDIO_MMC_CARD 2
96#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SDIO_MMC_CARD
97
98/* Defines for SPL */
99#define CONFIG_SPL_FRAMEWORK
100#define CONFIG_SPL_SIZE (140 << 10)
101#define CONFIG_SPL_TEXT_BASE 0x40000030
102#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
103
104#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
105#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
106
107#ifdef CONFIG_SPL_BUILD
108#define CONFIG_SYS_MALLOC_SIMPLE
109#endif
110
111#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
112#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
113
Stefan Roese73606402015-10-20 15:14:47 +0200114#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
115/* SPL related SPI defines */
Stefan Roese73606402015-10-20 15:14:47 +0200116#define CONFIG_SPL_SPI_LOAD
Stefan Roese73606402015-10-20 15:14:47 +0200117#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
118#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
119#endif
120
121#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
122/* SPL related MMC defines */
Stefan Roese73606402015-10-20 15:14:47 +0200123#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
124#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
Stefan Roese73606402015-10-20 15:14:47 +0200125#ifdef CONFIG_SPL_BUILD
126#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
127#endif
128#endif
129
Stefan Roese73606402015-10-20 15:14:47 +0200130/*
131 * mv-common.h should be defined after CMD configs since it used them
132 * to enable certain macros
133 */
134#include "mv-common.h"
135
Patrick Wildt7e5b0192017-05-10 15:12:34 +0200136/* Include the common distro boot environment */
137#ifndef CONFIG_SPL_BUILD
138#include <config_distro_defaults.h>
139
140#ifdef CONFIG_MMC
141#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
142#else
143#define BOOT_TARGET_DEVICES_MMC(func)
144#endif
145
146#ifdef CONFIG_USB_STORAGE
147#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
148#else
149#define BOOT_TARGET_DEVICES_USB(func)
150#endif
151
152#define BOOT_TARGET_DEVICES(func) \
153 BOOT_TARGET_DEVICES_MMC(func) \
154 BOOT_TARGET_DEVICES_USB(func) \
155 func(PXE, pxe, na) \
156 func(DHCP, dhcp, na)
157
158#define KERNEL_ADDR_R __stringify(0x800000)
159#define FDT_ADDR_R __stringify(0x100000)
160#define RAMDISK_ADDR_R __stringify(0x1800000)
161#define SCRIPT_ADDR_R __stringify(0x200000)
162#define PXEFILE_ADDR_R __stringify(0x300000)
163
164#define LOAD_ADDRESS_ENV_SETTINGS \
165 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
166 "fdt_addr_r=" FDT_ADDR_R "\0" \
167 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
168 "scriptaddr=" SCRIPT_ADDR_R "\0" \
169 "pxefile_addr_r=" PXEFILE_ADDR_R "\0"
170
171#include <config_distro_bootcmd.h>
172
173#define CONFIG_EXTRA_ENV_SETTINGS \
174 RELOCATION_LIMITS_ENV_SETTINGS \
175 LOAD_ADDRESS_ENV_SETTINGS \
176 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
177 "console=ttyS0,115200\0" \
178 BOOTENV
179
180#endif /* CONFIG_SPL_BUILD */
181
Stefan Roese73606402015-10-20 15:14:47 +0200182#endif /* _CONFIG_CLEARFOG_H */