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Tim Harvey354a7e32014-06-02 16:13:20 -07001/*
2 * Copyright (C) 2014 Gateworks Corporation
3 * Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
4 *
5 * Author: Tim Harvey <tharvey@gateworks.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#include <common.h>
11#include <asm/io.h>
12#include <asm/arch/imx-regs.h>
Jagan Tekie5f970b2017-02-24 15:45:12 +053013#include <asm/arch/sys_proto.h>
Tim Harvey354a7e32014-06-02 16:13:20 -070014#include <asm/spl.h>
15#include <spl.h>
Stefano Babic33731bc2017-06-29 10:16:06 +020016#include <asm/mach-imx/hab.h>
Tim Harvey354a7e32014-06-02 16:13:20 -070017
Jagan Teki7bb61bb2017-08-28 16:45:47 +053018DECLARE_GLOBAL_DATA_PTR;
19
Tim Harvey354a7e32014-06-02 16:13:20 -070020#if defined(CONFIG_MX6)
Nikita Kiryanov9fba8422014-10-29 19:28:33 +020021/* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */
Tim Harvey354a7e32014-06-02 16:13:20 -070022u32 spl_boot_device(void)
23{
Jagan Tekic981a942017-02-24 15:45:15 +053024 unsigned int bmode = readl(&src_base->sbmr2);
Jagan Tekie5f970b2017-02-24 15:45:12 +053025 u32 reg = imx6_src_get_boot_mode();
Tim Harvey354a7e32014-06-02 16:13:20 -070026
Stefano Babic587e72e2015-12-11 17:30:42 +010027 /*
28 * Check for BMODE if serial downloader is enabled
29 * BOOT_MODE - see IMX6DQRM Table 8-1
30 */
Stefan Agner15390962016-12-27 17:01:42 +010031 if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */
Stefan Agnera0a50ce2017-08-15 17:49:43 -070032 return BOOT_DEVICE_BOARD;
Jagan Teki32a71142017-02-24 15:45:14 +053033
Tim Harvey354a7e32014-06-02 16:13:20 -070034 /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
Jagan Teki32a71142017-02-24 15:45:14 +053035 switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
Tim Harvey354a7e32014-06-02 16:13:20 -070036 /* EIM: See 8.5.1, Table 8-9 */
Jagan Teki32a71142017-02-24 15:45:14 +053037 case IMX6_BMODE_EMI:
Tim Harvey354a7e32014-06-02 16:13:20 -070038 /* BOOT_CFG1[3]: NOR/OneNAND Selection */
Jagan Teki32a71142017-02-24 15:45:14 +053039 switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) {
40 case IMX6_BMODE_ONENAND:
Tim Harvey354a7e32014-06-02 16:13:20 -070041 return BOOT_DEVICE_ONENAND;
Jagan Teki32a71142017-02-24 15:45:14 +053042 case IMX6_BMODE_NOR:
Tim Harvey354a7e32014-06-02 16:13:20 -070043 return BOOT_DEVICE_NOR;
44 break;
Jagan Teki32a71142017-02-24 15:45:14 +053045 }
Stefan Agner15390962016-12-27 17:01:42 +010046 /* Reserved: Used to force Serial Downloader */
Stefan Agner53456f52017-08-15 17:49:42 -070047 case IMX6_BMODE_RESERVED:
Stefan Agnera0a50ce2017-08-15 17:49:43 -070048 return BOOT_DEVICE_BOARD;
Tim Harvey354a7e32014-06-02 16:13:20 -070049 /* SATA: See 8.5.4, Table 8-20 */
Stefan Agner34da4732017-08-29 09:10:11 -070050#if !defined(CONFIG_MX6UL) && !defined(CONFIG_MX6ULL)
Jagan Teki32a71142017-02-24 15:45:14 +053051 case IMX6_BMODE_SATA:
Tim Harvey354a7e32014-06-02 16:13:20 -070052 return BOOT_DEVICE_SATA;
Stefan Agner34da4732017-08-29 09:10:11 -070053#endif
Tim Harvey354a7e32014-06-02 16:13:20 -070054 /* Serial ROM: See 8.5.5.1, Table 8-22 */
Jagan Teki32a71142017-02-24 15:45:14 +053055 case IMX6_BMODE_SERIAL_ROM:
Tim Harvey354a7e32014-06-02 16:13:20 -070056 /* BOOT_CFG4[2:0] */
Jagan Teki32a71142017-02-24 15:45:14 +053057 switch ((reg & IMX6_BMODE_SERIAL_ROM_MASK) >>
58 IMX6_BMODE_SERIAL_ROM_SHIFT) {
59 case IMX6_BMODE_ECSPI1:
60 case IMX6_BMODE_ECSPI2:
61 case IMX6_BMODE_ECSPI3:
62 case IMX6_BMODE_ECSPI4:
63 case IMX6_BMODE_ECSPI5:
Tim Harvey354a7e32014-06-02 16:13:20 -070064 return BOOT_DEVICE_SPI;
Jagan Teki32a71142017-02-24 15:45:14 +053065 case IMX6_BMODE_I2C1:
66 case IMX6_BMODE_I2C2:
67 case IMX6_BMODE_I2C3:
Tim Harvey354a7e32014-06-02 16:13:20 -070068 return BOOT_DEVICE_I2C;
69 }
70 break;
71 /* SD/eSD: 8.5.3, Table 8-15 */
Jagan Teki32a71142017-02-24 15:45:14 +053072 case IMX6_BMODE_SD:
73 case IMX6_BMODE_ESD:
Breno Lima4d9bf022016-11-30 10:08:58 -020074 return BOOT_DEVICE_MMC1;
Tim Harvey354a7e32014-06-02 16:13:20 -070075 /* MMC/eMMC: 8.5.3 */
Jagan Teki32a71142017-02-24 15:45:14 +053076 case IMX6_BMODE_MMC:
77 case IMX6_BMODE_EMMC:
Tim Harvey354a7e32014-06-02 16:13:20 -070078 return BOOT_DEVICE_MMC1;
Jagan Teki4191b222017-02-24 15:45:13 +053079 /* NAND Flash: 8.5.2, Table 8-10 */
Jagan Teki32a71142017-02-24 15:45:14 +053080 case IMX6_BMODE_NAND:
Tim Harvey354a7e32014-06-02 16:13:20 -070081 return BOOT_DEVICE_NAND;
82 }
83 return BOOT_DEVICE_NONE;
84}
85#endif
86
87#if defined(CONFIG_SPL_MMC_SUPPORT)
88/* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
Marek Vasut64d64bb2016-05-14 23:42:07 +020089u32 spl_boot_mode(const u32 boot_device)
Tim Harvey354a7e32014-06-02 16:13:20 -070090{
91 switch (spl_boot_device()) {
92 /* for MMC return either RAW or FAT mode */
93 case BOOT_DEVICE_MMC1:
94 case BOOT_DEVICE_MMC2:
Pierre Aubert530c0a42014-12-12 14:38:22 +010095#if defined(CONFIG_SPL_FAT_SUPPORT)
Guillaume GARDET602a16c2014-10-15 17:53:11 +020096 return MMCSD_MODE_FS;
Pierre Aubert530c0a42014-12-12 14:38:22 +010097#elif defined(CONFIG_SUPPORT_EMMC_BOOT)
98 return MMCSD_MODE_EMMCBOOT;
Tim Harvey354a7e32014-06-02 16:13:20 -070099#else
100 return MMCSD_MODE_RAW;
101#endif
102 break;
103 default:
104 puts("spl: ERROR: unsupported device\n");
105 hang();
106 }
107}
108#endif
Sven Ebenfeldeba5e332016-11-06 16:37:55 +0100109
110#if defined(CONFIG_SECURE_BOOT)
111
112__weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
113{
114 typedef void __noreturn (*image_entry_noargs_t)(void);
115
116 image_entry_noargs_t image_entry =
117 (image_entry_noargs_t)(unsigned long)spl_image->entry_point;
118
Tom Rinif1c2fc02017-01-11 10:45:48 -0500119 debug("image entry point: 0x%lX\n", spl_image->entry_point);
Sven Ebenfeldeba5e332016-11-06 16:37:55 +0100120
121 /* HAB looks for the CSF at the end of the authenticated data therefore,
122 * we need to subtract the size of the CSF from the actual filesize */
123 if (authenticate_image(spl_image->load_addr,
124 spl_image->size - CONFIG_CSF_SIZE)) {
125 image_entry();
126 } else {
127 puts("spl: ERROR: image authentication unsuccessful\n");
128 hang();
129 }
130}
131
Jagan Teki7bb61bb2017-08-28 16:45:47 +0530132#endif
133
134#if defined(CONFIG_MX6) && defined(CONFIG_SPL_OS_BOOT)
135int dram_init_banksize(void)
136{
137 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
138 gd->bd->bi_dram[0].size = imx_ddr_size();
139
140 return 0;
141}
Sven Ebenfeldeba5e332016-11-06 16:37:55 +0100142#endif