Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 2e8783b2da9e0bfbf722e291be7c6b4c2471b7f5 / . / configs / socfpga_is1_defconfig
blob: c3b6368f61710c70265ade470146c31596e3b07c [file] [log] [blame]
Pavel Machek9802e872016-06-07 12:37:23 +0200[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_SOCFPGA=y
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]3CONFIG_SYS_MALLOC_LEN=0x4000000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]4CONFIG_ENV_SIZE=0x2000
5CONFIG_ENV_OFFSET=0x100000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]6CONFIG_ENV_SECT_SIZE=0x10000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]7CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]8CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]9CONFIG_SPL_TEXT_BASE=0xFFFF0000
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]10CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]11CONFIG_TARGET_SOCFPGA_IS1=y
Tom Rini732aa4a2018-02-10 16:54:38 -0500[diff] [blame]12CONFIG_DISTRO_DEFAULTS=y
Tom Rini4ddbade2022-05-25 12:16:03 -0400[diff] [blame]13CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
14CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
Pavel Machek9802e872016-06-07 12:37:23 +0200[diff] [blame]15CONFIG_FIT=y
Simon Glass65831d92021-12-18 11:27:50 -0700[diff] [blame]16CONFIG_TIMESTAMP=y
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]17CONFIG_USE_BOOTARGS=y
18CONFIG_BOOTARGS="console=ttyS0,115200"
Tom Rini732aa4a2018-02-10 16:54:38 -0500[diff] [blame]19# CONFIG_USE_BOOTCOMMAND is not set
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]20CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Simon Glassac3ee422016-10-17 20:12:59 -0600[diff] [blame]21CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
Simon Glass217652f2016-10-17 20:12:58 -0600[diff] [blame]22CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]23# CONFIG_DISPLAY_BOARDINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]24CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Rini2bfc77a2022-03-23 17:20:08 -0400[diff] [blame]25CONFIG_CLOCKS=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]26CONFIG_SPL_PAD_TO=0x10000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]27CONFIG_SPL_NO_BSS_LIMIT=y
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]28# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
29CONFIG_SPL_STACK=0xfffffff8
Marek Vasute2542252018-04-07 16:05:27 +0200[diff] [blame]30CONFIG_SPL_SPI_LOAD=y
Tom Rinie22fa4f2021-08-10 15:08:46 -0400[diff] [blame]31CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]32CONFIG_SYS_MAXARGS=32
Pavel Machek9802e872016-06-07 12:37:23 +0200[diff] [blame]33CONFIG_CMD_ASKENV=y
34CONFIG_CMD_GREPENV=y
Pavel Machek9802e872016-06-07 12:37:23 +0200[diff] [blame]35# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]36CONFIG_CMD_GPIO=y
37CONFIG_CMD_I2C=y
Pavel Machek9802e872016-06-07 12:37:23 +0200[diff] [blame]38CONFIG_CMD_SPI=y
Pavel Machek9802e872016-06-07 12:37:23 +0200[diff] [blame]39CONFIG_CMD_CACHE=y
40CONFIG_CMD_TIME=y
Pavel Machek9802e872016-06-07 12:37:23 +0200[diff] [blame]41CONFIG_CMD_EXT4_WRITE=y
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]42CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
Marek Vasutc0169f32019-10-02 18:54:45 +0200[diff] [blame]43CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)"
Heiko Schocher09dbb852016-09-21 07:58:19 +0200[diff] [blame]44CONFIG_CMD_UBI=y
Tom Rini2cbc1202018-04-28 10:45:55 -0400[diff] [blame]45# CONFIG_ISO_PARTITION is not set
46# CONFIG_EFI_PARTITION is not set
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]47CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]48CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rini5fb860c2022-02-25 11:19:48 -0500[diff] [blame]49CONFIG_USE_BOOTFILE=y
50CONFIG_BOOTFILE="zImage"
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]51CONFIG_VERSION_VARIABLE=y
Tom Rinia8a77502022-03-11 09:12:01 -0500[diff] [blame]52CONFIG_ARP_TIMEOUT=500
Pavel Machek9802e872016-06-07 12:37:23 +0200[diff] [blame]53CONFIG_SPL_DM_SEQ_ALIAS=y
Lukasz Majewski6dd8c902018-02-09 23:50:57 +0100[diff] [blame]54CONFIG_BOOTCOUNT_LIMIT=y
Pavel Machek9802e872016-06-07 12:37:23 +0200[diff] [blame]55CONFIG_DWAPB_GPIO=y
Dinh Nguyena75fcc12018-04-04 17:18:21 -0500[diff] [blame]56CONFIG_DM_I2C=y
Pavel Machek9802e872016-06-07 12:37:23 +0200[diff] [blame]57CONFIG_SYS_I2C_DW=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]58# CONFIG_MMC is not set
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]59CONFIG_MTD=y
Pavel Machek9802e872016-06-07 12:37:23 +0200[diff] [blame]60CONFIG_SPI_FLASH_STMICRO=y
Frieder Schrempfd7be62c2019-10-23 07:41:20 +0000[diff] [blame]61CONFIG_SPI_FLASH_MTD=y
Alexandru Gagniuc4e24ff62017-08-01 17:20:00 -0700[diff] [blame]62CONFIG_PHY_MICREL=y
63CONFIG_PHY_MICREL_KSZ90X1=y
Pavel Machek9802e872016-06-07 12:37:23 +0200[diff] [blame]64CONFIG_DM_ETH=y
65CONFIG_ETH_DESIGNWARE=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]66CONFIG_MII=y
Dinh Nguyenbfddbb22018-04-04 17:18:25 -0500[diff] [blame]67CONFIG_DM_RESET=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]68CONFIG_SPI=y
Pavel Machek9802e872016-06-07 12:37:23 +0200[diff] [blame]69CONFIG_CADENCE_QSPI=y
Simon Goldschmidtfe6275f2019-10-05 22:10:11 +0200[diff] [blame]70# CONFIG_SPL_WDT is not set