Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 2e8783b2da9e0bfbf722e291be7c6b4c2471b7f5 / . / configs / at91sam9n12ek_mmc_defconfig
blob: 95f62e84e43a8eff68b574364f3f74f4e24ef631 [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Masahiro Yamadaaf908ee2015-02-20 17:04:01 +0900[diff] [blame]3CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x26f00000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]5CONFIG_TARGET_AT91SAM9N12EK=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
Markus Klotzbuecher7bd60e62019-05-15 15:15:54 +0200[diff] [blame]7CONFIG_ENV_SIZE=0x4000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]8CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]9CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek"
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]10CONFIG_DEBUG_UART_BASE=0xfffff200
11CONFIG_DEBUG_UART_CLOCK=132000000
Tom Rini7c027e02022-06-20 08:13:12 -0400[diff] [blame]12CONFIG_DEBUG_UART_BOARD_INIT=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]13CONFIG_SYS_LOAD_ADDR=0x22000000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]14CONFIG_DEBUG_UART=y
Tom Rini4ddbade2022-05-25 12:16:03 -0400[diff] [blame]15CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
16CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x303f00
Wenyou Yange035ea72017-09-14 11:07:44 +0800[diff] [blame]17CONFIG_SD_BOOT=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]18CONFIG_BOOTDELAY=3
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]19CONFIG_USE_BOOTCOMMAND=y
20CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};fatload mmc 0:1 0x21000000 dtb;fatload mmc 0:1 0x22000000 uImage;bootm 0x22000000 - 0x21000000"
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]21CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]22# CONFIG_DISPLAY_BOARDINFO is not set
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]23CONFIG_HUSH_PARSER=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]24CONFIG_SYS_PROMPT="U-Boot> "
Tom Riniae17fa32022-05-11 18:01:06 -0400[diff] [blame]25CONFIG_SYS_CBSIZE=256
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]26CONFIG_SYS_PBSIZE=281
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]27CONFIG_CMD_BOOTZ=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]28# CONFIG_CMD_FLASH is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]29CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]30CONFIG_CMD_NAND=y
31CONFIG_CMD_NAND_TRIMFFS=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]32# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]33CONFIG_CMD_DHCP=y
Tom Rini1c47c4a2022-02-25 11:19:50 -0500[diff] [blame]34CONFIG_BOOTP_BOOTFILESIZE=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]35CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]36CONFIG_CMD_FAT=y
Tom Rinic20bb732017-07-22 18:36:16 -0400[diff] [blame]37CONFIG_CMD_MTDPARTS=y
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]38CONFIG_MTDIDS_DEFAULT="nand0=atmel_nand"
39CONFIG_MTDPARTS_DEFAULT="mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs)"
Wenyou Yang487d1132017-04-18 14:54:51 +0800[diff] [blame]40CONFIG_OF_CONTROL=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]41CONFIG_ENV_IS_IN_FAT=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]42CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Wenyou Yang487d1132017-04-18 14:54:51 +0800[diff] [blame]43CONFIG_DM=y
44CONFIG_CLK=y
45CONFIG_CLK_AT91=y
Wenyou Yang487d1132017-04-18 14:54:51 +0800[diff] [blame]46CONFIG_AT91_GPIO=y
Wenyou Yang487d1132017-04-18 14:54:51 +0800[diff] [blame]47CONFIG_GENERIC_ATMEL_MCI=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]48CONFIG_MTD=y
Miquel Raynald0935362019-10-03 19:50:03 +0200[diff] [blame]49CONFIG_MTD_RAW_NAND=y
Adam Ford9c519182018-07-08 08:11:07 -0500[diff] [blame]50CONFIG_NAND_ATMEL=y
Tudor Ambarus2c4f6ce2021-01-08 14:40:17 +0200[diff] [blame]51CONFIG_ATMEL_NAND_HW_PMECC=y
Wenyou Yang487d1132017-04-18 14:54:51 +0800[diff] [blame]52CONFIG_DM_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]53CONFIG_SF_DEFAULT_SPEED=30000000
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]54CONFIG_SPI_FLASH_ATMEL=y
Marek Vasutf4622282020-03-25 19:08:59 +0100[diff] [blame]55CONFIG_KS8851_MLL=y
56CONFIG_KS8851_MLL_BASEADDR=0x30000000
Wenyou Yang487d1132017-04-18 14:54:51 +0800[diff] [blame]57CONFIG_PINCTRL=y
58CONFIG_PINCTRL_AT91=y
59CONFIG_DM_SERIAL=y
Wenyou Yange3c99302017-04-18 14:54:53 +0800[diff] [blame]60CONFIG_DEBUG_UART_ANNOUNCE=y
Wenyou Yang487d1132017-04-18 14:54:51 +0800[diff] [blame]61CONFIG_ATMEL_USART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]62CONFIG_SPI=y
Wenyou Yang487d1132017-04-18 14:54:51 +0800[diff] [blame]63CONFIG_DM_SPI=y
Wenyou.Yang@microchip.com272167d2017-08-15 17:40:27 +0800[diff] [blame]64CONFIG_TIMER=y
65CONFIG_ATMEL_PIT_TIMER=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]66CONFIG_USB=y
Tom Rinicc8db2a2020-06-16 19:06:06 -0400[diff] [blame]67CONFIG_ATMEL_HLCD=y