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git01.mediatek.com / filogic / uboot / 2e8783b2da9e0bfbf722e291be7c6b4c2471b7f5 / . / configs / T4240RDB_defconfig
blob: 9f6457fc3a30f1893c88621d2f623f5815e6f391 [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_PPC=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0xEFF40000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]3CONFIG_ENV_SIZE=0x2000
4CONFIG_ENV_SECT_SIZE=0x20000
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]5CONFIG_DEFAULT_DEVICE_TREE="t4240rdb"
Tom Rini89cdcab2021-12-12 22:12:31 -0500[diff] [blame]6CONFIG_VID=y
7CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv"
8CONFIG_VOL_MONITOR_IR36021_READ=y
9CONFIG_VOL_MONITOR_IR36021_SET=y
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]10CONFIG_ENV_ADDR=0xEFF20000
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]11CONFIG_MPC85xx=y
12CONFIG_TARGET_T4240RDB=y
Hou Zhiqiang245d4922019-08-20 09:35:25 +0000[diff] [blame]13CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
Tom Rinia7fa9762022-06-15 12:03:45 -0400[diff] [blame]14CONFIG_ENABLE_36BIT_PHYS=y
Tom Rini7485ebf62022-06-20 08:07:45 -0400[diff] [blame]15<<<<<<< HEAD
16=======
17CONFIG_PCIE1=y
18CONFIG_PCIE2=y
19CONFIG_PCIE3=y
20CONFIG_PCIE4=y
21CONFIG_VID=y
22CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv"
23CONFIG_VOL_MONITOR_IR36021_READ=y
24CONFIG_VOL_MONITOR_IR36021_SET=y
25>>>>>>> Convert CONFIG_PCIE1 et al to Kconfig
Tom Rini5ca768d2022-01-24 21:08:41 +0000[diff] [blame]26CONFIG_MP=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]27CONFIG_FIT=y
28CONFIG_FIT_VERBOSE=y
29CONFIG_OF_BOARD_SETUP=y
30CONFIG_OF_STDOUT_VIA_ALIAS=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]31CONFIG_BOOTDELAY=10
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]32CONFIG_USE_BOOTCOMMAND=y
33CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
Tom Rinif05f9d82022-04-13 09:14:57 -0400[diff] [blame]34CONFIG_ARCH_MISC_INIT=y
Mario Six75b23ed2018-03-28 14:38:15 +0200[diff] [blame]35CONFIG_BOARD_EARLY_INIT_R=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]36CONFIG_HUSH_PARSER=y
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]37CONFIG_SYS_PBSIZE=276
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]38CONFIG_CMD_IMLS=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]39CONFIG_CMD_GREPENV=y
Camelia Grozae8b72422021-04-13 19:48:02 +0300[diff] [blame]40CONFIG_CMD_DM=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]41CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]42CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]43CONFIG_CMD_USB=y
44CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]45CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]46CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]47CONFIG_CMD_EXT2=y
48CONFIG_CMD_FAT=y
Hou Zhiqiang245d4922019-08-20 09:35:25 +0000[diff] [blame]49CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]50CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]51CONFIG_ENV_IS_IN_FLASH=y
Tom Rini5fb860c2022-02-25 11:19:48 -0500[diff] [blame]52CONFIG_USE_BOOTFILE=y
53CONFIG_BOOTFILE="uImage"
Tom Rinife586752022-03-11 09:12:07 -0500[diff] [blame]54CONFIG_USE_ETHPRIME=y
55CONFIG_ETHPRIME="FM1@DTSEC1"
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]56CONFIG_DM=y
Tom Rini276d75e2022-06-10 22:59:27 -0400[diff] [blame]57CONFIG_FSL_SATA_V2=y
Simon Glass231e7742022-01-31 07:49:37 -0700[diff] [blame]58CONFIG_SYS_SATA_MAX_DEVICE=2
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]59CONFIG_FSL_CAAM=y
Tom Rinif7246c22021-08-21 13:50:17 -0400[diff] [blame]60CONFIG_DDR_CLK_FREQ=133333333
Tom Rini468c2d52021-08-21 13:50:18 -0400[diff] [blame]61CONFIG_DDR_ECC=y
62CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]63CONFIG_DM_I2C=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]64CONFIG_SPL_SYS_I2C_LEGACY=y
Tom Rinib1b13072021-08-18 23:12:37 -0400[diff] [blame]65CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Tom Rinibe94c762021-08-18 23:12:35 -0400[diff] [blame]66CONFIG_SYS_I2C_FSL=y
67CONFIG_SYS_FSL_I2C_OFFSET=0x118000
68CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
69CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]70CONFIG_FSL_ESDHC=y
Miquel Raynal803baa22019-10-03 19:50:08 +0200[diff] [blame]71CONFIG_MTD=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]72CONFIG_MTD_NOR_FLASH=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]73CONFIG_FLASH_CFI_DRIVER=y
74CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
75CONFIG_SYS_FLASH_CFI=y
Patrick Delaunay1576abf2022-01-04 14:24:00 +0100[diff] [blame]76CONFIG_SYS_MAX_FLASH_BANKS=2
Tom Rini526e3c82020-10-05 13:11:41 -0400[diff] [blame]77CONFIG_DM_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]78CONFIG_SF_DEFAULT_SPEED=10000000
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]79CONFIG_SPI_FLASH_SST=y
Alexandru Gagniucd83e98c2017-08-01 17:19:59 -0700[diff] [blame]80CONFIG_PHYLIB=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]81CONFIG_PHYLIB_10G=y
Tom Rini84e35db2019-11-26 17:32:42 -0500[diff] [blame]82CONFIG_PHY_CORTINA=y
Kuldeep Singh016965f2021-08-10 11:20:07 +0530[diff] [blame]83CONFIG_CORTINA_FW_ADDR=0xefe00000
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]84CONFIG_PHY_TERANETICS=y
85CONFIG_PHY_VITESSE=y
Camelia Grozae8b72422021-04-13 19:48:02 +0300[diff] [blame]86CONFIG_DM_ETH=y
87CONFIG_DM_MDIO=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]88CONFIG_PHY_GIGE=y
Simon Glass9008a5b2015-08-19 09:33:43 -0600[diff] [blame]89CONFIG_E1000=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]90CONFIG_FMAN_ENET=y
Rajesh Bhagataec38012021-11-09 16:30:38 +0530[diff] [blame]91CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]92CONFIG_MII=y
Hou Zhiqiang90420022019-08-27 11:03:16 +0000[diff] [blame]93CONFIG_DM_PCI_COMPAT=y
94CONFIG_PCIE_FSL=y
Tom Rinifa911f82019-05-12 07:59:12 -0400[diff] [blame]95CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]96CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]97CONFIG_SPI=y
Tom Rini526e3c82020-10-05 13:11:41 -0400[diff] [blame]98CONFIG_DM_SPI=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]99CONFIG_FSL_ESPI=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]100CONFIG_USB=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]101CONFIG_USB_EHCI_FSL=y
Tom Rinibde21702022-06-12 20:02:04 -0400[diff] [blame]102CONFIG_USB_MAX_CONTROLLER_COUNT=2
Tom Rini526e3c82020-10-05 13:11:41 -0400[diff] [blame]103CONFIG_USB_STORAGE=y
Marek Szyprowski795dc7d2020-06-03 14:43:40 +0200[diff] [blame]104CONFIG_ADDR_MAP=y
105CONFIG_SYS_NUM_ADDR_MAP=64