Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (c) 2017-2018 MediaTek Inc. |
| 4 | * Author: Sean Wang <sean.wang@mediatek.com> |
| 5 | * |
| 6 | */ |
| 7 | |
| 8 | /dts-v1/; |
| 9 | #include <dt-bindings/power/mt7623a-power.h> |
| 10 | #include "mt7623.dtsi" |
| 11 | |
| 12 | &afe { |
| 13 | power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>; |
| 14 | }; |
| 15 | |
| 16 | &crypto { |
| 17 | power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>; |
| 18 | }; |
| 19 | |
| 20 | &gmac0 { |
| 21 | status = "okay"; |
| 22 | phy-mode = "trgmii"; |
| 23 | |
| 24 | fixed-link { |
| 25 | speed = <1000>; |
| 26 | full-duplex; |
| 27 | pause; |
| 28 | }; |
| 29 | }; |
| 30 | |
| 31 | &gmac1 { |
| 32 | status = "okay"; |
| 33 | phy-mode = "rgmii"; |
| 34 | |
| 35 | fixed-link { |
| 36 | speed = <1000>; |
| 37 | full-duplex; |
| 38 | pause; |
| 39 | }; |
| 40 | }; |
| 41 | |
| 42 | ð { |
| 43 | status = "okay"; |
| 44 | power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>; |
| 45 | |
| 46 | mdio: mdio-bus { |
| 47 | #address-cells = <1>; |
| 48 | #size-cells = <0>; |
| 49 | |
| 50 | switch0: switch@1f { |
| 51 | compatible = "mediatek,mt7530"; |
| 52 | reg = <0x1f>; |
| 53 | mediatek,mcm; |
| 54 | resets = <ðsys MT2701_ETHSYS_MCM_RST>; |
| 55 | reset-names = "mcm"; |
| 56 | core-supply = <&mt6323_vpa_reg>; |
| 57 | io-supply = <&mt6323_vemc3v3_reg>; |
| 58 | |
| 59 | ports { |
| 60 | #address-cells = <1>; |
| 61 | #size-cells = <0>; |
| 62 | |
| 63 | port@0 { |
| 64 | status = "disabled"; |
| 65 | reg = <0>; |
| 66 | label = "swp0"; |
| 67 | }; |
| 68 | |
| 69 | port@1 { |
| 70 | status = "disabled"; |
| 71 | reg = <1>; |
| 72 | label = "swp1"; |
| 73 | }; |
| 74 | |
| 75 | port@2 { |
| 76 | status = "disabled"; |
| 77 | reg = <2>; |
| 78 | label = "swp2"; |
| 79 | }; |
| 80 | |
| 81 | port@3 { |
| 82 | status = "disabled"; |
| 83 | reg = <3>; |
| 84 | label = "swp3"; |
| 85 | }; |
| 86 | |
| 87 | port@4 { |
| 88 | status = "disabled"; |
| 89 | reg = <4>; |
| 90 | label = "swp4"; |
| 91 | }; |
| 92 | |
| 93 | port@5 { |
| 94 | reg = <5>; |
| 95 | label = "cpu"; |
| 96 | ethernet = <&gmac1>; |
| 97 | phy-mode = "rgmii"; |
| 98 | |
| 99 | fixed-link { |
| 100 | speed = <1000>; |
| 101 | full-duplex; |
| 102 | pause; |
| 103 | }; |
| 104 | }; |
| 105 | |
| 106 | port@6 { |
| 107 | reg = <6>; |
| 108 | label = "cpu"; |
| 109 | ethernet = <&gmac0>; |
| 110 | phy-mode = "trgmii"; |
| 111 | |
| 112 | fixed-link { |
| 113 | speed = <1000>; |
| 114 | full-duplex; |
| 115 | pause; |
| 116 | }; |
| 117 | }; |
| 118 | }; |
| 119 | }; |
| 120 | }; |
| 121 | }; |
| 122 | |
| 123 | &nandc { |
| 124 | power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>; |
| 125 | }; |
| 126 | |
| 127 | &pcie { |
| 128 | power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>; |
| 129 | }; |
| 130 | |
| 131 | &scpsys { |
| 132 | compatible = "mediatek,mt7623a-scpsys"; |
| 133 | clocks = <&topckgen CLK_TOP_ETHIF_SEL>; |
| 134 | clock-names = "ethif"; |
| 135 | }; |
| 136 | |
| 137 | &usb0 { |
| 138 | power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>; |
| 139 | }; |
| 140 | |
| 141 | &usb1 { |
| 142 | power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>; |
| 143 | }; |
| 144 | |
| 145 | &usb2 { |
| 146 | power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>; |
| 147 | }; |