| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/net/qcom,ethqos.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Qualcomm Ethernet ETHQOS device |
| 8 | |
| 9 | maintainers: |
| 10 | - Bhupesh Sharma <bhupesh.sharma@linaro.org> |
| 11 | |
| 12 | description: |
| 13 | dwmmac based Qualcomm ethernet devices which support Gigabit |
| 14 | ethernet (version v2.3.0 and onwards). |
| 15 | |
| 16 | allOf: |
| 17 | - $ref: snps,dwmac.yaml# |
| 18 | |
| 19 | properties: |
| 20 | compatible: |
| 21 | enum: |
| 22 | - qcom,qcs404-ethqos |
| 23 | - qcom,sa8775p-ethqos |
| 24 | - qcom,sc8280xp-ethqos |
| 25 | - qcom,sm8150-ethqos |
| 26 | |
| 27 | reg: |
| 28 | maxItems: 2 |
| 29 | |
| 30 | reg-names: |
| 31 | items: |
| 32 | - const: stmmaceth |
| 33 | - const: rgmii |
| 34 | |
| 35 | interrupts: |
| 36 | minItems: 1 |
| 37 | items: |
| 38 | - description: Combined signal for various interrupt events |
| 39 | - description: The interrupt that occurs when Rx exits the LPI state |
| 40 | |
| 41 | interrupt-names: |
| 42 | minItems: 1 |
| 43 | items: |
| 44 | - const: macirq |
| 45 | - const: eth_lpi |
| 46 | |
| 47 | clocks: |
| 48 | maxItems: 4 |
| 49 | |
| 50 | clock-names: |
| 51 | items: |
| 52 | - const: stmmaceth |
| 53 | - const: pclk |
| 54 | - const: ptp_ref |
| 55 | - enum: |
| 56 | - rgmii |
| 57 | - phyaux |
| 58 | |
| 59 | iommus: |
| 60 | maxItems: 1 |
| 61 | |
| 62 | phys: true |
| 63 | |
| 64 | phy-names: |
| 65 | const: serdes |
| 66 | |
| 67 | required: |
| 68 | - compatible |
| 69 | - clocks |
| 70 | - clock-names |
| 71 | - reg-names |
| 72 | |
| 73 | unevaluatedProperties: false |
| 74 | |
| 75 | examples: |
| 76 | - | |
| 77 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 78 | #include <dt-bindings/clock/qcom,gcc-qcs404.h> |
| 79 | #include <dt-bindings/gpio/gpio.h> |
| 80 | |
| 81 | ethernet: ethernet@7a80000 { |
| 82 | compatible = "qcom,qcs404-ethqos"; |
| 83 | reg = <0x07a80000 0x10000>, |
| 84 | <0x07a96000 0x100>; |
| 85 | reg-names = "stmmaceth", "rgmii"; |
| 86 | clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; |
| 87 | clocks = <&gcc GCC_ETH_AXI_CLK>, |
| 88 | <&gcc GCC_ETH_SLAVE_AHB_CLK>, |
| 89 | <&gcc GCC_ETH_PTP_CLK>, |
| 90 | <&gcc GCC_ETH_RGMII_CLK>; |
| 91 | interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, |
| 92 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; |
| 93 | interrupt-names = "macirq", "eth_lpi"; |
| 94 | |
| 95 | rx-fifo-depth = <4096>; |
| 96 | tx-fifo-depth = <4096>; |
| 97 | |
| 98 | snps,tso; |
| 99 | snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>; |
| 100 | snps,reset-active-low; |
| 101 | snps,reset-delays-us = <0 10000 10000>; |
| 102 | |
| 103 | pinctrl-names = "default"; |
| 104 | pinctrl-0 = <ðernet_defaults>; |
| 105 | |
| 106 | phy-handle = <&phy1>; |
| 107 | phy-mode = "rgmii"; |
| 108 | mdio { |
| 109 | #address-cells = <0x1>; |
| 110 | #size-cells = <0x0>; |
| 111 | |
| 112 | compatible = "snps,dwmac-mdio"; |
| 113 | phy1: phy@4 { |
| 114 | compatible = "ethernet-phy-ieee802.3-c22"; |
| 115 | device_type = "ethernet-phy"; |
| 116 | reg = <0x4>; |
| 117 | |
| 118 | #phy-cells = <0>; |
| 119 | }; |
| 120 | }; |
| 121 | }; |