blob: e69bca95031f41664f1800a2d91a23df5f849741 [file] [log] [blame]
Jim Liu4359b332022-04-19 13:32:19 +08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 *
4 * Copyright (c) 2021 Nuvoton Technology Corp.
5 */
6
7#include <common.h>
8#include <dm.h>
Jim Liuc4ab55c2023-06-13 15:45:54 +08009#include <env.h>
Jim Liu4359b332022-04-19 13:32:19 +080010#include <asm/io.h>
11#include <asm/arch/gcr.h>
12#include <asm/mach-types.h>
Jim Liuc32c95c2023-11-14 16:51:59 +080013#include "../common/uart.h"
Jim Liu4359b332022-04-19 13:32:19 +080014
15DECLARE_GLOBAL_DATA_PTR;
16
17int board_init(void)
18{
19 return 0;
20}
21
22int dram_init(void)
23{
24 struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA;
25
26 int ramsize = (readl(&gcr->intcr3) >> 8) & 0x7;
27
28 switch (ramsize) {
29 case 0:
30 gd->ram_size = 0x08000000; /* 128 MB. */
31 break;
32 case 1:
33 gd->ram_size = 0x10000000; /* 256 MB. */
34 break;
35 case 2:
36 gd->ram_size = 0x20000000; /* 512 MB. */
37 break;
38 case 3:
39 gd->ram_size = 0x40000000; /* 1024 MB. */
40 break;
41 case 4:
42 gd->ram_size = 0x80000000; /* 2048 MB. */
43 break;
44
45 default:
46 break;
47 }
48
Jim Liu4359b332022-04-19 13:32:19 +080049 return 0;
50}
Jim Liuc32c95c2023-11-14 16:51:59 +080051
52int last_stage_init(void)
53{
Jim Liu63273612024-04-23 15:22:08 +080054
55 char value[32];
56 struct udevice *dev = gd->cur_serial_dev;
57
58 if (gd->ram_size > 0) {
59 sprintf(value, "%ldM", (gd->ram_size / 0x100000));
60 env_set("mem", value);
61 }
62
63 if (dev && (dev->seq_ >= 0)) {
64 void *addr;
65 addr = dev_read_addr_ptr(dev);
66 if (addr) {
67 sprintf(value, "uart8250,mmio32,0x%x", (u32)addr);
68 env_set("earlycon", value);
69 }
70 sprintf(value, "ttyS%d,115200n8", dev->seq_);
71 env_set("console", value);
72 board_set_console();
73 }
Jim Liuc32c95c2023-11-14 16:51:59 +080074
75 return 0;
76}